公开(公告)号：US08480577B2

公开(公告)日：2013-07-09

申请号：US11205792

申请日：2005-08-17

申请人： Mark Joseph Tuccillo

发明人： Mark Joseph Tuccillo

IPC分类号： A61B5/00

CPC分类号： H03F3/24 ,  A61B5/0006 ,  A61B5/0456 ,  A61B5/055 ,  G01R33/3692 ,  H03F3/45475 ,  H03F3/60 ,  H03F9/00 ,  H03F2200/114 ,  H03F2203/45566 ,  H03F2203/45662

摘要： A wireless patient monitoring system. In one embodiment the system has a first patient monitoring subsystem including a plurality of sensors and sensor modules; and a processor-transceiver in communication with the plurality of sensors and sensor modules; and a first clinician display subsystem including a processor-transceiver. The processor-transceiver of the first clinician display subsystem broadcasts, on a first predetermined frequency, the frequency the processor-transceiver of the first clinician display subsystem will use to communicate with the processor-transceiver of the first patient monitoring subsystem. The processor-transceiver of the first patient monitoring subsystem then transmits and receives data on the frequency that the processor-transceiver of the first clinician display subsystem will use to communicate with the processor-transceiver of the first patient monitoring subsystem. The processor-transceiver of the first patient monitoring subsystem reverts to the first frequency if communication with the processor-transceiver of the first clinician display subsystem is lost.

摘要翻译： 无线患者监护系统。 在一个实施例中，系统具有包括多个传感器和传感器模块的第一患者监控子系统; 以及与所述多个传感器和传感器模块通信的处理器收发器; 以及包括处理器收发器的第一临床医生显示子系统。 第一临床医生显示子系统的处理器收发器以第一预定频率广播第一临床医生显示子系统的处理器收发器将用于与第一患者监视子系统的处理器收发器通信的频率。 第一患者监视子系统的处理器收发器然后以第一临床医生显示子系统的处理器收发器将用于与第一患者监视子系统的处理器收发器通信的频率来发送和接收数据。 如果与第一临床医生显示子系统的处理器收发器的通信丢失，则第一患者监视子系统的处理器收发器恢复到第一频率。

公开(公告)号：US07764885B2

公开(公告)日：2010-07-27

申请号：US11626081

申请日：2007-01-23

申请人： The'Linh Nguyen ,  Timothy G. Moran

发明人： The'Linh Nguyen ,  Timothy G. Moran

IPC分类号： H04B10/00

CPC分类号： H03F3/45475 ,  H03F3/45085 ,  H03F2203/45134 ,  H03F2203/45324 ,  H03F2203/45566 ,  H03F2203/45631 ,  H03F2203/45641 ,  H03F2203/45654 ,  H03K5/1565

摘要： Modules and signal control circuits configured to at least partially compensate for or adjust for asymmetric rise/fall time. The circuit may include a first input node configured to receive a first data signal and a second input node configured to receive a second data signal that is complementary of the first data signal. The circuit may also include a first stage having a first node coupled to the first input node and a second node coupled to the second input node and a second stage having a first node coupled to a third node of the first stage and a second node coupled to a fourth node of the first stage. The second stage may be configured to drive a load such as a laser. The circuit may further include a third input node configured to receive a third data signal and a fourth input node configured to receive a fourth data signal that is the complementary of the third data signal. Additionally, a control stage having a first node coupled the third input node, having a second node coupled to the fourth input node, having a third node coupled to the third node of the first stage and having a fourth node coupled to the fourth node of the first stage.

摘要翻译： 模块和信号控制电路被配置为至少部分地补偿或调整不对称的上升/下降时间。 电路可以包括被配置为接收第一数据信号的第一输入节点和被配置为接收与第一数据信号互补的第二数据信号的第二输入节点。 电路还可以包括具有耦合到第一输入节点的第一节点和耦合到第二输入节点的第二节点的第一阶段和具有耦合到第一阶段的第三节点的第一节点的第二阶段和耦合到第二节点的第二节点 到第一级的第四个节点。 第二级可以被配置为驱动诸如激光器的负载。 电路还可以包括被配置为接收第三数据信号的第三输入节点和被配置为接收作为第三数据信号的互补的第四数据信号的第四输入节点。 另外，控制级具有耦合第三输入节点的第一节点，具有耦合到第四输入节点的第二节点，具有耦合到第一级的第三节点的第三节点，并且具有耦合到第四节点的第四节点的第四节点 第一阶段

公开(公告)号：US20090231041A1

公开(公告)日：2009-09-17

申请号：US12351461

申请日：2009-01-09

申请人： John B. Groe ,  Michael Naone Farias ,  Eric Shapiro

发明人： John B. Groe ,  Michael Naone Farias ,  Eric Shapiro

IPC分类号： H03F3/72

CPC分类号： H03F3/211 ,  H03F3/45188 ,  H03F2203/45566 ,  H03F2203/45731

摘要： Variable gain commutating amplifier apparatus and methods for use in a polar modulator are described. The apparatus may include two or more commutating amplifier stages configured to be switched to an output load based on a desired amplitude and/or transmit power level. The amplifier stages may include cross-coupled differential pairs to cancel RF carrier feedthrough. An additional R-2R ladder circuit may be provided to further extend the dynamic range by reducing the output power at the lowest output stages.

摘要翻译： 描述了用于极性调制器的可变增益整流放大器装置和方法。 该装置可以包括两个或更多个整流放大器级，其被配置为基于期望的幅度和/或发射功率电平切换到输出负载。 放大器级可以包括交叉耦合的差分对以消除RF载波馈通。 可以提供另外的R-2R梯形电路以通过降低最低输出级的输出功率来进一步扩展动态范围。

公开(公告)号：US07449951B2

公开(公告)日：2008-11-11

申请号：US11429772

申请日：2006-05-08

申请人： Tae-Hwan Oh

发明人： Tae-Hwan Oh

IPC分类号： H03F3/30

CPC分类号： H03F3/45183 ,  H03F3/3022 ,  H03F2200/513 ,  H03F2203/45562 ,  H03F2203/45566

摘要： An operational amplifier includes a differential amplifier for amplifying differential input signals to generate differential amplified signals. The operational amplifier also includes first and second single-ended amplifiers that each amplify the differential amplified signals to respectively generate first and second single-ended output signals that are differential with respect to each-other.

摘要翻译： 运算放大器包括用于放大差分输入信号以产生差分放大信号的差分放大器。 运算放大器还包括第一和第二单端放大器，其每个放大差分放大信号以分别产生相对于另一个差分的第一和第二单端输出信号。

公开(公告)号：US07245144B1

公开(公告)日：2007-07-17

申请号：US11169242

申请日：2005-06-27

申请人： Wilson Wong ,  Sergey Shumarayev

发明人： Wilson Wong ,  Sergey Shumarayev

IPC分类号： H03K17/16

CPC分类号： H03K19/018564 ,  H03F3/45928 ,  H03F2203/45078 ,  H03F2203/45082 ,  H03F2203/45101 ,  H03F2203/45134 ,  H03F2203/45138 ,  H03F2203/45154 ,  H03F2203/45222 ,  H03F2203/45541 ,  H03F2203/45566 ,  H03F2203/45626 ,  H03F2203/45681 ,  H03F2203/45686

摘要： Systems and methods are provided using common-mode-voltage bias circuitry to make common-mode-voltage adjustments to differential driver circuitry in integrated circuit differential communications links. Adjustable bias circuitry may be controlled using static and dynamic control signals. Dynamic control signals can be produced by core logic on a programmable logic device or other integrated circuit. Static control signals can be produced by programmable elements. Bias circuit adjustments made at one end of a differential link can be used to improve performance at either end of the link or can be used to improve power consumption or to balance power and performance considerations. The same integrated circuit design can be used in both AC-coupled and DC-coupled environments. The bias circuitry can be formed from an adjustable current source and adjustable resistor. The current source and adjustable resistors can be controlled by the same control signals.

摘要翻译： 使用共模电压偏置电路提供系统和方法，以对集成电路差分通信链路中的差分驱动器电路进行共模电压调整。 可调节的偏置电路可以使用静态和动态控制信号来控制。 动态控制信号可以由可编程逻辑器件或其他集成电路上的核心逻辑产生。 静态控制信号可以由可编程元件产生。 差分链路一端进行的偏置电路调整可用于提高链路两端的性能，或者可用于提高功耗或平衡功率和性能考虑。 同样的集成电路设计可用于交流耦合和直流耦合环境。 偏置电路可以由可调电流源和可调电阻器形成。 电流源和可调电阻可由相同的控制信号控制。

公开(公告)号：US20040239375A1

公开(公告)日：2004-12-02

申请号：US10490729

申请日：2004-03-24

发明人： Keisuke Kuroda ,  Takeshi Uemura ,  Toshiyuki Nozoe

IPC分类号： H03K005/153

CPC分类号： H03K5/08 ,  H03F3/45183 ,  H03F2203/45566 ,  H03F2203/45636 ,  H03F2203/45664 ,  H03F2203/45674

摘要： A sensor signal output circuit includes a first differential amplifier, a first load resistor, a first transistor, a second transistor and a limiter section. The limiter section includes at least a second differential amplifier, which includes an input end coupled to output terminal and an other input end coupled to second reference voltage setting part, a second load resistor for a second differential amplifier, and a third transistor, which includes a gate connected to an output end of the second differential amplifier and a source connected to a gate of the second transistor.

摘要翻译： 传感器信号输出电路包括第一差分放大器，第一负载电阻器，第一晶体管，第二晶体管和限幅器部分。 限幅器部分至少包括第二差分放大器，其包括耦合到输出端的输入端和耦合到第二参考电压设置部分的另一输入端，用于第二差分放大器的第二负载电阻器和第三晶体管，其包括 连接到第二差分放大器的输出端的栅极和连接到第二晶体管的栅极的源极。

公开(公告)号：US20040130392A1

公开(公告)日：2004-07-08

申请号：US10695042

申请日：2003-10-28

发明人： Noriaki Saito

IPC分类号： H03F003/68

CPC分类号： H03F3/68 ,  H03F1/223 ,  H03F1/26 ,  H03F3/189 ,  H03F3/4508 ,  H03F3/45089 ,  H03F3/45094 ,  H03F2200/111 ,  H03F2200/372 ,  H03F2200/429 ,  H03F2203/45566

摘要： In a multi-band amplifier, provided are a first differential voltage-to-current converting circuit for converting a first frequency signal into a current and outputting the current, a second differential voltage-to-current converting circuit for converting a second frequency signal into a current and outputting the current, and a current transposition point connected in phase with and in parallel with output terminals of the first and second differential voltage-to-current converting circuits. A base-grounded amplifying circuit is connected in phase with and in series with an output terminal of the current transposition point. With this configuration, the circuit of a virtual ground point and the following of after voltage-to-current conversion can be provided in common by using a cascode amplifier as a low-noise amplifier, making it possible to constitute a multi-band amplifier minimized in the connection loss resulting from interconnection.

摘要翻译： 在多频带放大器中，提供了用于将第一频率信号转换为电流并输出电流的第一差分电压 - 电流转换电路，用于将第二频率信号转换成第二频率信号的第二差分电压 - 电流转换电路 电流并输出电流，以及与第一和第二差分电压 - 电流转换电路的输出端相同相并联并联的当前转置点。 基极接地放大电路与当前转置点的输出端相同相并串联连接。 利用这种配置，可以通过使用共源共栅放大器作为低噪声放大器来共同地提供虚拟接地点的电路和以后的电压 - 电流转换之后的电路，使得可以构成多频带放大器最小化 在互连造成的连接损失。

公开(公告)号：US06657486B2

公开(公告)日：2003-12-02

申请号：US10234129

申请日：2002-09-05

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： G06G726

CPC分类号： H03F3/45717 ,  G06G7/14 ,  H03F3/45183 ,  H03F3/4565 ,  H03F3/4569 ,  H03F3/45708 ,  H03F3/45739 ,  H03F2203/45456 ,  H03F2203/45484 ,  H03F2203/45566 ,  H03F2203/45612 ,  H03F2203/45702

摘要： A MOS differential amplifier circuit has a differential pair having first and second MOS transistors. The source electrodes of the first and second MOS transistors are commonly coupled and driven by a current source, which can be adjusted to change the transconductance of the amplifier. The circuit can be provided with a quadri-tall cell or level shifter in order to provide this operation. With these operational characteristics, the MOS differential pair of this type can be used in a voltage adder/subtractor circuit.

摘要翻译： MOS差分放大器电路具有具有第一和第二MOS晶体管的差分对。 第一和第二MOS晶体管的源极通常由电流源耦合和驱动，电流源可以被调节以改变放大器的跨导。 为了提供这种操作，该电路可以设置有四节细胞或电平移位器。 利用这些操作特性，这种类型的MOS差分对可以用在电压加法器/减法器电路中。

公开(公告)号：US06657485B2

公开(公告)日：2003-12-02

申请号：US10137298

申请日：2002-05-03

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： G06G712

CPC分类号： H03F3/45717 ,  G06G7/14 ,  H03F3/45183 ,  H03F3/4565 ,  H03F3/4569 ,  H03F3/45708 ,  H03F3/45739 ,  H03F2203/45456 ,  H03F2203/45484 ,  H03F2203/45566 ,  H03F2203/45612 ,  H03F2203/45702

摘要： A MOS differential amplifier circuit has a differential pair having first and second MOS transistors. The source electrodes of the first and second MOS transistors are commonly coupled and driven by a constant current source. The current sources can be controlled so that the difference between the common mode voltage and the common source voltage becomes constant, and a level shifter may be provided for level-shifting the common source voltage of the first and second MOS transistor. The MOS differential amplifier circuit so designed can be used in a voltage adder/subtractor circuit.

摘要翻译： MOS差分放大器电路具有具有第一和第二MOS晶体管的差分对。 第一和第二MOS晶体管的源电极通常由恒定电流源耦合和驱动。 可以控制电流源，使得共模电压和公共源电压之间的差变为恒定，并且可以提供电平移位器来对第一和第二MOS晶体管的公共源电压进行电平移位。 这样设计的MOS差分放大器电路可以用在电压加法器/减法器电路中。

公开(公告)号：US09843297B2

公开(公告)日：2017-12-12

申请号：US14814080

申请日：2015-07-30

申请人： COSEMI TECHNOLOGIES, INC.

发明人： Robert Monroe Smith ,  Charles Phillip McClay

IPC分类号： H03F3/45 ,  H03F3/08 ,  H03F1/56 ,  H03F1/02 ,  H03F1/08

CPC分类号： H03F1/56 ,  H03F1/0205 ,  H03F1/083 ,  H03F3/08 ,  H03F3/45076 ,  H03F3/45085 ,  H03F3/45183 ,  H03F3/45475 ,  H03F3/45605 ,  H03F3/45609 ,  H03F3/45618 ,  H03F3/45753 ,  H03F3/45757 ,  H03F3/45766 ,  H03F3/45977 ,  H03F3/45982 ,  H03F3/45991 ,  H03F2200/135 ,  H03F2200/18 ,  H03F2200/222 ,  H03F2200/228 ,  H03F2200/36 ,  H03F2200/393 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2200/462 ,  H03F2200/471 ,  H03F2200/474 ,  H03F2200/72 ,  H03F2200/75 ,  H03F2203/45036 ,  H03F2203/45051 ,  H03F2203/45114 ,  H03F2203/45116 ,  H03F2203/45138 ,  H03F2203/45146 ,  H03F2203/45152 ,  H03F2203/45154 ,  H03F2203/45166 ,  H03F2203/45202 ,  H03F2203/45208 ,  H03F2203/45221 ,  H03F2203/45276 ,  H03F2203/45336 ,  H03F2203/45374 ,  H03F2203/45398 ,  H03F2203/45528 ,  H03F2203/45541 ,  H03F2203/45556 ,  H03F2203/45564 ,  H03F2203/45566 ,  H03F2203/45592 ,  H03F2203/45594 ,  H03F2203/45652 ,  H03F2203/45682 ,  H03F2203/45702

摘要： A balanced differential transimpedance amplifier with a single-ended input operational over a wide variation in the dynamic range of input signals. A threshold circuit is employed to either or a combination of (1) generate a varying decision threshold to ensure a proper slicing over a wide range of input current signal levels; and (2) generate a bias current and voltage applied to an input of a transimpedance stage to cancel out a dependence of the transimpedance stage voltage input on input current signal levels.