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    TVS diode and assembly having asymmetric breakdown voltage
    3.
    发明授权
    TVS diode and assembly having asymmetric breakdown voltage 有权

    公开(公告)号：US12068307B2

    公开(公告)日：2024-08-20

    申请号：US18123600

    申请日：2023-03-20

    申请人： Littelfuse Semiconductor (Wuxi) Co., Ltd.

    发明人： Jianfei Zeng ,  Cai Yingda

    IPC分类号： H01L27/02 ,  H01L29/66 ,  H01L29/866

    CPC分类号： H01L27/0255 ,  H01L29/66098 ,  H01L29/866

    摘要： In one embodiment, an asymmetric TVS device may include a semiconductor substrate, comprising an inner region, the inner region having a first polarity, and a first surface region, disposed on a first surface of the semiconductor substrate, the first surface region comprising a second polarity, opposite the first polarity. The asymmetric TVS device may also include a second surface region, comprising the second polarity, and disposed on a second surface of the semiconductor substrate, opposite the first surface, wherein the first surface region comprises a first dopant concentration, and wherein the second surface region comprises a second dopant concentration, greater than the first dopant concentration.

    Charge Carrier Extraction Inverse Diode
    5.
    发明申请
    Charge Carrier Extraction Inverse Diode 审中-公开

    公开(公告)号：US20190067493A1

    公开(公告)日：2019-02-28

    申请号：US15693392

    申请日：2017-08-31

    申请人： IXYS, LLC

    发明人： Kyoung Wook Seok

    IPC分类号： H01L29/861 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66

    CPC分类号： H01L29/8611 ,  H01L23/3171 ,  H01L29/0603 ,  H01L29/0619 ,  H01L29/402 ,  H01L29/66098 ,  H01L29/66136 ,  H01L29/861

    摘要： An inverse diode die is “fast” (i.e., has a small peak reverse recovery current) due to the presence of a novel topside P+ type charge carrier extraction region and a lightly-doped bottomside transparent anode. During forward conduction, the number of charge carriers in the N-type drift region is reduced due to holes being continuously extracted by an electric field set up by the P+ type charge carrier extraction region. Electrons are extracted by the transparent anode. When the voltage across the device is then reversed, the magnitude of the peak reverse recovery current is reduced due to there being a smaller number of charge carriers that need to be removed before the diode can begin reverse blocking mode operation. Advantageously, the diode is fast without having to include lifetime killers or otherwise introduce recombination centers. The inverse diode therefore has a desirably small reverse leakage current.

    Semiconductor Device Comprising Electrostatic Discharge Protection Structure
    6.
    发明申请
    Semiconductor Device Comprising Electrostatic Discharge Protection Structure 审中-公开
    包括静电放电保护结构的半导体器件

    公开(公告)号：US20160307884A1

    公开(公告)日：2016-10-20

    申请号：US15099327

    申请日：2016-04-14

    申请人： Infineon Technologies Dresden GmbH

    发明人： Joachim Weyers ,  Markus Schmitt ,  Armin Tilke

    IPC分类号： H01L27/02 ,  H01L29/866 ,  H01L29/66 ,  H01L27/06

    CPC分类号： H01L27/0255 ,  H01L27/0629 ,  H01L29/0619 ,  H01L29/16 ,  H01L29/66098 ,  H01L29/66106 ,  H01L29/6634 ,  H01L29/7396 ,  H01L29/861 ,  H01L29/866

    摘要： A semiconductor device comprises a semiconductor body having a first surface and a second surface opposite to the first surface. The semiconductor device further comprises a first isolation layer on the first surface of the semiconductor body, and an electrostatic discharge protection structure on the first isolation layer. The electrostatic discharge protection structure includes a first terminal and a second terminal. The semiconductor device further comprises a heat dissipation structure having a first end in direct contact with the electrostatic discharge protection structure and a second end in direct contact with an electrically isolating region. The electrostatic discharge protection structure comprises first and second outdiffusion regions of the same conductivity type being self-aligned to the heat dissipation structure and further comprising a net dopant profile declining with increasing distance from the heat dissipation structure in a lateral direction between the first terminal and the second terminal.

    摘要翻译： 半导体器件包括具有第一表面和与第一表面相对的第二表面的半导体本体。 半导体器件还包括在半导体主体的第一表面上的第一隔离层和第一隔离层上的静电放电保护结构。 静电放电保护结构包括第一端子和第二端子。 半导体器件还包括散热结构，其具有与静电放电保护结构直接接触的第一端和与电绝缘区直接接触的第二端。 静电放电保护结构包括与散热结构自对准的相同导电类型的第一和第二扩散扩散区域，还包括净掺杂剂分布，其在第一端子与第一端子与 第二个终端。

    PROTECTING ELEMENT
    7.
    发明申请
    PROTECTING ELEMENT 有权
    保护元件

    公开(公告)号：US20120228738A1

    公开(公告)日：2012-09-13

    申请号：US13475375

    申请日：2012-05-18

    申请人： Tetsuro ASANO ,  Mikito SAKAKIBARA ,  Toshikazu HIRAI

    发明人： Tetsuro ASANO ,  Mikito SAKAKIBARA ,  Toshikazu HIRAI

    IPC分类号： H01L29/02

    CPC分类号： H01L27/0255 ,  H01L24/48 ,  H01L27/0248 ,  H01L27/0288 ,  H01L29/66098 ,  H01L29/80 ,  H01L29/812 ,  H01L29/861 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/05599

    摘要： With a microwave FET, an incorporated Schottky junction capacitance or PN junction capacitance is small and such a junction is weak against static electricity. However, with a microwave device, the method of connecting a protecting diode cannot be used since this method increases the parasitic capacitance and causes degradation of the high-frequency characteristics. In order to solve the above problems, a protecting element, having a first n+-type region-insulating region-second n+-type region arrangement is connected in parallel between two terminals of a protected element having a PN junction, Schottky junction, or capacitor. Since discharge can be performed between the first and second n+ regions that are adjacent each other, electrostatic energy that would reach the operating region of an FET can be attenuated without increasing the parasitic capacitance.

    摘要翻译： 使用微波FET，结合的肖特基结电容或PN结电容小，并且这种结对静电弱。 然而，利用微波装置，不能使用连接保护二极管的方法，因为这种方法增加了寄生电容并导致高频特性的劣化。 为了解决上述问题，具有第一n +型区域 - 第二n +型区域布置的保护元件并联连接在具有PN结，肖特基结或电容器的受保护元件的两个端子之间 。 由于可以在彼此相邻的第一和第二n +区之间进行放电，所以可以在不增加寄生电容的情况下衰减到达FET工作区域的静电能量。

    Semiconductor device comprising a diode and a method for producing such a device
    8.
    发明授权
    Semiconductor device comprising a diode and a method for producing such a device 有权
    包括二极管的半导体器件和用于制造这种器件的方法

    公开(公告)号：US09263401B2

    公开(公告)日：2016-02-16

    申请号：US14066545

    申请日：2013-10-29

    申请人： IMEC

    发明人： Geert Hellings ,  Mirko Scholz ,  Dimitri Linten

    IPC分类号： H01L23/60 ,  H01L29/36 ,  H01L29/66 ,  H01L29/866 ,  H01L29/73 ,  H01L27/02 ,  H01L29/06

    CPC分类号： H01L23/60 ,  H01L27/0255 ,  H01L29/0649 ,  H01L29/0688 ,  H01L29/36 ,  H01L29/6609 ,  H01L29/66098 ,  H01L29/66106 ,  H01L29/66234 ,  H01L29/7302 ,  H01L29/735 ,  H01L29/866 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The disclosed technology relates to a semiconductor device comprising a diode junction between two semiconductor regions of different doping types. In one aspect, the diode comprises a junction formed between an upper portion of an active area and a remainder of the active area, where the active area is defined in a substrate between two field dielectric regions. The upper portion is a portion of the active area that has a width smaller than a width of the active area itself. In another aspect, the semiconductor device is an electrostatic discharge protection device (ESD) comprising such a diode. In addition, the active area has a doping profile that exhibits a maximum value at the surface of the active area, and changes to a minimum value at a first depth, where the first depth can be greater in value than half of a depth of the upper portion. In another aspect, a method of fabrication the device does not require a separate ESD implant for lowering the holding voltage and can allow for a reduction in the number of processing steps as well as other devices comprising a diode junction.

    摘要翻译： 所公开的技术涉及包括不同掺杂类型的两个半导体区域之间的二极管结的半导体器件。 在一个方面，二极管包括在有源区的上部和有源区的其余部分之间形成的结，其中有源区限定在两个场介电区之间的衬底中。 上部是活动区域的宽度小于有效区域本身的宽度的部分。 在另一方面，半导体器件是包括这种二极管的静电放电保护器件（ESD）。 此外，有源区具有在有源区的表面处呈现最大值的掺杂分布，并且在第一深度处变化为最小值，其中第一深度可以比值的深度的一半更大 上部。 在另一方面，制造该器件的方法不需要用于降低保持电压的单独的ESD注入，并且可以允许减少处理步骤的数量以及包括二极管结的其它器件。

    PROTECTING ELEMENT HAVING FIRST AND SECOND HIGH CONCENTRATION IMPURITY REGIONS SEPARATED BY INSULATING REGION AND METHOD
    9.
    发明申请
    PROTECTING ELEMENT HAVING FIRST AND SECOND HIGH CONCENTRATION IMPURITY REGIONS SEPARATED BY INSULATING REGION AND METHOD 有权
    具有绝缘区域和方法分开的第一和第二高浓度区域的保护元件

    公开(公告)号：US20140225227A1

    公开(公告)日：2014-08-14

    申请号：US14253395

    申请日：2014-04-15

    申请人： Semiconductor Components Industries, LLC

    发明人： Tetsuro Asano ,  Mikito Sakakibara ,  Toshikazu Hirai

    IPC分类号： H01L27/02 ,  H01L29/66

    CPC分类号： H01L27/0255 ,  H01L24/48 ,  H01L27/0248 ,  H01L27/0288 ,  H01L29/66098 ,  H01L29/80 ,  H01L29/812 ,  H01L29/861 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/05599

    摘要： With a microwave FET, an incorporated Schottky junction capacitance or PN junction capacitance is small and such a junction is weak against static electricity. However, with a microwave device, the method of connecting a protecting diode cannot be used since this method increases the parasitic capacitance and causes degradation of the high-frequency characteristics. In order to solve the above problems, a protecting element, having a first n+-type region—insulating region—second n+-type region arrangement is connected in parallel between two terminals of a protected element having a PN junction, Schottky junction, or capacitor. Since discharge can be performed between the first and second n+ regions that are adjacent each other, electrostatic energy that would reach the operating region of an FET can be attenuated without increasing the parasitic capacitance.

    摘要翻译： 使用微波FET，结合的肖特基结电容或PN结电容小，并且这种结对静电弱。 然而，利用微波装置，不能使用连接保护二极管的方法，因为这种方法增加了寄生电容并导致高频特性的劣化。 为了解决上述问题，具有第一n +型区域 - 第二n +型区域布置的保护元件并联连接在具有PN结，肖特基结或电容器的受保护元件的两个端子之间 。 由于可以在彼此相邻的第一和第二n +区之间进行放电，所以可以在不增加寄生电容的情况下衰减到达FET工作区域的静电能量。

    SEMICONDUCTOR DEVICE COMPRISING A DIODE AND A METHOD FOR PRODUCING SUCH A DEVICE
    10.
    发明申请
    SEMICONDUCTOR DEVICE COMPRISING A DIODE AND A METHOD FOR PRODUCING SUCH A DEVICE 有权
    包含二极管的半导体器件和用于生产这种器件的方法

    公开(公告)号：US20140124894A1

    公开(公告)日：2014-05-08

    申请号：US14066545

    申请日：2013-10-29

    申请人： IMEC

    发明人： Geert Hellings ,  Mirko Scholz ,  Dimitri Linten

    IPC分类号： H01L23/60 ,  H01L29/66 ,  H01L29/73

    CPC分类号： H01L23/60 ,  H01L27/0255 ,  H01L29/0649 ,  H01L29/0688 ,  H01L29/36 ,  H01L29/6609 ,  H01L29/66098 ,  H01L29/66106 ,  H01L29/66234 ,  H01L29/7302 ,  H01L29/735 ,  H01L29/866 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The disclosed technology relates to a semiconductor device comprising a diode junction between two semiconductor regions of different doping types. In one aspect, the diode comprises a junction formed between an upper portion of an active area and a remainder of the active area, where the active area is defined in a substrate between two field dielectric regions. The upper portion is a portion of the active area that has a width smaller than a width of the active area itself. In another aspect, the semiconductor device is an electrostatic discharge protection device (ESD) comprising such a diode. In addition, the active area has a doping profile that exhibits a maximum value at the surface of the active area, and changes to a minimum value at a first depth, where the first depth can be greater in value than half of a depth of the upper portion. In another aspect, a method of fabrication the device does not require a separate ESD implant for lowering the holding voltage and can allow for a reduction in the number of processing steps as well as other devices comprising a diode junction.

    摘要翻译： 所公开的技术涉及包括不同掺杂类型的两个半导体区域之间的二极管结的半导体器件。 在一个方面，二极管包括在有源区的上部和有源区的其余部分之间形成的结，其中有源区限定在两个场介电区之间的衬底中。 上部是活动区域的宽度小于有效区域本身的宽度的部分。 在另一方面，半导体器件是包括这种二极管的静电放电保护器件（ESD）。 此外，有源区具有在有源区的表面处呈现最大值的掺杂分布，并且在第一深度处变化为最小值，其中第一深度可以比值的深度的一半更大 上部。 在另一方面，制造该器件的方法不需要用于降低保持电压的单独的ESD注入，并且可以允许减少处理步骤的数量以及包括二极管结的其它器件。