公开(公告)号：US09735142B2

公开(公告)日：2017-08-15

申请号：US14253395

申请日：2014-04-15

申请人： Semiconductor Components Industries, LLC

发明人： Tetsuro Asano ,  Mikito Sakakibara ,  Toshikazu Hirai

IPC分类号： H01L27/02 ,  H01L23/00 ,  H01L29/80 ,  H01L29/812 ,  H01L29/861 ,  H01L29/66

CPC分类号： H01L27/0255 ,  H01L24/48 ,  H01L27/0248 ,  H01L27/0288 ,  H01L29/66098 ,  H01L29/80 ,  H01L29/812 ,  H01L29/861 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/05599

摘要： With a microwave FET, an incorporated Schottky junction capacitance or PN junction capacitance is small and such a junction is weak against static electricity. However, with a microwave device, the method of connecting a protecting diode cannot be used since this method increases the parasitic capacitance and causes degradation of the high-frequency characteristics. In order to solve the above problems, a protecting element, having a first n+-type region—insulating region—second n+-type region arrangement is connected in parallel between two terminals of a protected element having a PN junction, Schottky junction, or capacitor. Since discharge can be performed between the first and second n+ regions that are adjacent each other, electrostatic energy that would reach the operating region of an FET can be attenuated without increasing the parasitic capacitance.

公开(公告)号：US20140225227A1

公开(公告)日：2014-08-14

申请号：US14253395

申请日：2014-04-15

申请人： Semiconductor Components Industries, LLC

发明人： Tetsuro Asano ,  Mikito Sakakibara ,  Toshikazu Hirai

IPC分类号： H01L27/02 ,  H01L29/66

CPC分类号： H01L27/0255 ,  H01L24/48 ,  H01L27/0248 ,  H01L27/0288 ,  H01L29/66098 ,  H01L29/80 ,  H01L29/812 ,  H01L29/861 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/05599

摘要： With a microwave FET, an incorporated Schottky junction capacitance or PN junction capacitance is small and such a junction is weak against static electricity. However, with a microwave device, the method of connecting a protecting diode cannot be used since this method increases the parasitic capacitance and causes degradation of the high-frequency characteristics. In order to solve the above problems, a protecting element, having a first n+-type region—insulating region—second n+-type region arrangement is connected in parallel between two terminals of a protected element having a PN junction, Schottky junction, or capacitor. Since discharge can be performed between the first and second n+ regions that are adjacent each other, electrostatic energy that would reach the operating region of an FET can be attenuated without increasing the parasitic capacitance.

摘要翻译： 使用微波FET，结合的肖特基结电容或PN结电容小，并且这种结对静电弱。 然而，利用微波装置，不能使用连接保护二极管的方法，因为这种方法增加了寄生电容并导致高频特性的劣化。 为了解决上述问题，具有第一n +型区域 - 第二n +型区域布置的保护元件并联连接在具有PN结，肖特基结或电容器的受保护元件的两个端子之间 。 由于可以在彼此相邻的第一和第二n +区之间进行放电，所以可以在不增加寄生电容的情况下衰减到达FET工作区域的静电能量。