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    CAVITY STRUCTURES FOR MEMS DEVICES
    5.
    发明申请
    CAVITY STRUCTURES FOR MEMS DEVICES 审中-公开
    MEMS器件的CAVITY结构

    公开(公告)号：US20150353344A1

    公开(公告)日：2015-12-10

    申请号：US14832426

    申请日：2015-08-21

    申请人： Infineon Technologies AG

    发明人： Bernhard Winkler ,  Andreas Zankl ,  Klemens Pruegl ,  Stefan Kolb

    IPC分类号： B81B7/00 ,  B81C1/00

    CPC分类号： B81B7/008 ,  B81B2201/0264 ,  B81B2203/0315 ,  B81B2207/015 ,  B81C1/00158 ,  B81C1/00246 ,  B81C2203/0707 ,  B81C2203/0714 ,  B81C2203/0735 ,  B81C2203/0771 ,  H01L27/0611

    摘要： Embodiments relate to MEMS devices and methods for manufacturing MEMS devices. In one embodiment, the manufacturing includes forming a monocrystalline sacrificial layer on a non-silicon-on-insulator (non-SOI) substrate, patterning the monocrystalline sacrificial layer such that the monocrystalline sacrificial layer remains in a first portion and is removed in a second portion lateral to the first portion; depositing a first silicon layer, the first silicon layer deposited on the remaining monocrystalline sacrificial layer and further lateral to the first portion; removing at least a portion of the monocrystalline sacrificial layer via at least one release aperture in the first silicon layer to form a cavity and sealing the cavity.

    摘要翻译： 实施例涉及用于制造MEMS器件的MEMS器件和方法。 在一个实施例中，制造包括在绝缘体上非绝缘体（非SOI）衬底上形成单晶牺牲层，图案化单晶牺牲层，使得单晶牺牲层保持在第一部分中并在第二部分中被去除 部分横向于第一部分; 沉积第一硅层，所述第一硅层沉积在剩余的单晶牺牲层上，并且进一步横向于所述第一部分; 通过所述第一硅层中的至少一个释放孔去除所述单晶牺牲层的至少一部分，以形成空腔并密封所述空腔。

    METHOD OF FABRICATING INTEGRATED STRUCTURE FOR MEMS DEVICE AND SEMICONDUCTOR DEVICE
    7.
    发明申请
    METHOD OF FABRICATING INTEGRATED STRUCTURE FOR MEMS DEVICE AND SEMICONDUCTOR DEVICE 有权
    制造MEMS器件和半导体器件的集成结构的方法

    公开(公告)号：US20150004732A1

    公开(公告)日：2015-01-01

    申请号：US14489495

    申请日：2014-09-18

    申请人： UNITED MICROELECTRONICS CORP.

    发明人： Bang-Chiang Lan ,  Li-Hsun Ho ,  Wei-Cheng Wu ,  Hui-Min Wu ,  Min Chen ,  Tzung-I Su ,  Chien-Hsin Huang

    IPC分类号： B81C1/00

    CPC分类号： B81C1/00246 ,  B81C1/00801 ,  B81C2201/014 ,  B81C2203/0714 ,  B81C2203/0742 ,  B81C2203/0792 ,  H01L27/0688

    摘要： A method of fabricating an integrated structure for MEMS device and semiconductor device comprises steps of: providing a substrate having a transistor thereon in a semiconductor device region and a first MEMS component thereon in a MEMS region; performing a interconnect process on the substrate in the semiconductor device region to form a plurality of first dielectric layers, at least a conductive plug and at least a conductive layer in the first dielectric layers; forming a plurality of second dielectric layers and an etch stopping device in the second dielectric layers on the substrate in a etch stopping device region; forming a plurality of third dielectric layers and at least a second MEMS component in the third dielectric layers on the substrate in the MEMS region; and performing an etching process to remove the third dielectric layers in the MEMS region.

    摘要翻译： 制造用于MEMS器件和半导体器件的集成结构的方法包括以下步骤：在半导体器件区域中提供其上具有晶体管的衬底及其中的MEMS区域中的第一MEMS部件; 在所述半导体器件区域中的所述衬底上执行互连处理，以形成多个第一电介质层，所述第一介电层中的至少导电插塞和至少导电层; 在蚀刻停止装置区域中在衬底上的第二介电层中形成多个第二电介质层和蚀刻停止装置; 在MEMS区域中的衬底上的第三电介质层中形成多个第三电介质层和至少第二MEMS部件; 并执行蚀刻工艺以去除MEMS区域中的第三介电层。

    MEMS PACKAGE STRUCTURE
    8.
    发明申请
    MEMS PACKAGE STRUCTURE 有权
    MEMS封装结构

    公开(公告)号：US20140339655A1

    公开(公告)日：2014-11-20

    申请号：US14449583

    申请日：2014-08-01

    申请人： PixArt Imaging Inc.

    发明人： HSIN-HUI HSU ,  SHENG-TA LEE ,  CHUAN-WEI WANG

    IPC分类号： B81B7/00

    CPC分类号： B81B7/0058 ,  B81B7/0006 ,  B81B2201/0264 ,  B81C1/00246 ,  B81C1/00293 ,  B81C2203/0136 ,  B81C2203/0145 ,  B81C2203/0714 ,  B81C2203/0735

    摘要： A MEMS package structure, including a substrate, an interconnecting structure, an upper metallic layer, a deposition element and a packaging element is provided. The interconnecting structure is disposed on the substrate. The MEMS structure is disposed on the substrate and within a first cavity. The upper metallic layer is disposed above the MEMS structure and the interconnecting structure, so as to form a second cavity located between the upper metallic layer and the interconnecting structure and communicates with the first cavity. The upper metallic layer has at least a first opening located above the interconnecting structure and at least a second opening located above the MEMS structure. Area of the first opening is greater than that of the second opening. The deposition element is disposed above the upper metallic layer to seal the second opening. The packaging element is disposed above the upper metallic layer to seal the first opening.

    摘要翻译： 提供了包括基板，互连结构，上金属层，沉积元件和封装元件的MEMS封装结构。 互连结构设置在基板上。 MEMS结构设置在基板上并在第一腔内。 上金属层设置在MEMS结构和互连结构之上，以便形成位于上金属层和互连结构之间的第二腔，并与第一腔连通。 上金属层具有位于互连结构上方的至少第一开口和位于MEMS结构上方的至少第二开口。 第一开口的面积大于第二开口的面积。 沉积元件设置在上金属层上方以密封第二开口。 包装元件设置在上金属层上方以密封第一开口。

    CMOS compatible MEMS microphone and method for manufacturing the same
    10.
    发明授权
    CMOS compatible MEMS microphone and method for manufacturing the same 有权
    CMOS兼容的MEMS麦克风及其制造方法

    公开(公告)号：US08847289B2

    公开(公告)日：2014-09-30

    申请号：US13581499

    申请日：2010-07-28

    申请人： Zhe Wang

    发明人： Zhe Wang

    IPC分类号： H01L29/84 ,  H04R31/00 ,  H04R19/00 ,  H04R19/04 ,  B81C1/00

    CPC分类号： H04R31/00 ,  B81B2201/0221 ,  B81B2201/0257 ,  B81B2207/015 ,  B81C1/00246 ,  B81C2203/0714 ,  B81C2203/0735 ,  H04R19/005 ,  H04R19/04

    摘要： A CMOS compatible MEMS microphone is disclosed. In one embodiment, the microphone comprises an SOI substrate, wherein a CMOS circuitry is accommodated on its silicon device layer; a microphone diaphragm formed with a part of the silicon device layer, wherein the microphone diaphragm is doped to become conductive; a microphone backplate including CMOS passivation layers with a metal layer sandwiched and a plurality of through holes, provided above the silicon device layer, wherein the plurality of through holes are formed in the portion thereof opposite to the microphone diaphragm, and the metal layer forms an electrode plate of the backplate; a plurality of dimples protruding from the lower surface of the microphone backplate opposite to the diaphragm; and an air gap provided between the diaphragm and the microphone backplate.

    摘要翻译： 公开了一种CMOS兼容的MEMS麦克风。 在一个实施例中，麦克风包括SOI衬底，其中CMOS电路容纳在其硅器件层上; 形成有硅器件层的一部分的麦克风隔膜，其中所述麦克风隔膜被掺杂以变成导电; 麦克风背板，包括设置在硅器件层上方的金属层的CMOS钝化层和多个通孔，其中多个通孔形成在与麦克风隔膜相对的部分中，金属层形成 背板电极板; 从所述麦克风背板的与所述隔膜相对的下表面突出的多个凹坑; 以及设置在隔膜和麦克风背板之间的气隙。