Near-Memory Computing Systems And Methods

    公开(公告)号:US20220276803A1

    公开(公告)日:2022-09-01

    申请号:US17187483

    申请日:2021-02-26

    申请人: PetaIO Inc.

    IPC分类号: G06F3/06

    摘要: Example near-memory computing systems and methods are described. In one implementation, a system includes a host command processing system and a computational engine associated with a solid-state drive. In some situations, the computational engine includes multiple versatile processing unit slices coupled to one another. The multiple versatile processing unit slices are configured to perform different tasks in parallel with one another. The system also includes a host direct memory access module configured to access memory devices independently of a central processing unit.

    Near-memory computing systems and methods

    公开(公告)号:US11645005B2

    公开(公告)日:2023-05-09

    申请号:US17187483

    申请日:2021-02-26

    申请人: PetaIO Inc.

    IPC分类号: G06F3/06

    摘要: Example near-memory computing systems and methods are described. In one implementation, a system includes a host command processing system and a computational engine associated with a solid-state drive. In some situations, the computational engine includes multiple versatile processing unit slices coupled to one another. The multiple versatile processing unit slices are configured to perform different tasks in parallel with one another. The system also includes a host direct memory access module configured to access memory devices independently of a central processing unit.

    Computational storage systems and methods

    公开(公告)号:US11507298B2

    公开(公告)日:2022-11-22

    申请号:US16996522

    申请日:2020-08-18

    申请人: PetaIO Inc.

    摘要: Example computational storage systems and methods are described. In one implementation, a storage drive controller includes a non-volatile memory subsystem to process multiple commands. Multiple versatile processing arrays are coupled to the non-volatile memory subsystem. The multiple versatile processing arrays can process multiple in-situ tasks. A host direct memory access module provides direct access to at least one memory device.

    Computational Storage Systems and Methods

    公开(公告)号:US20220057959A1

    公开(公告)日:2022-02-24

    申请号:US16996522

    申请日:2020-08-18

    申请人: PetaIO Inc.

    IPC分类号: G06F3/06

    摘要: Example computational storage systems and methods are described. In one implementation, a storage drive controller includes a non-volatile memory subsystem to process multiple commands. Multiple versatile processing arrays are coupled to the non-volatile memory subsystem. The multiple versatile processing arrays can process multiple in-situ tasks. A host direct memory access module provides direct access to at least one memory device.

    QoS assisted AES engine for SSD controller

    公开(公告)号:US10855444B2

    公开(公告)日:2020-12-01

    申请号:US16169433

    申请日:2018-10-24

    申请人: PetalO Inc.

    摘要: A flow controller selects a direction (encryption/decryption) for an AES core according to quality of service parameters and a number of data words in encryption and decryption data buffers. A direction ratio may be calculated as a function of the quality of service parameters and the number of data words in the encryption and decryption data buffers. The flow controller selects the direction to reduce a cost function. The cost function may be at a minimum when a ratio of words in the encryption and decryption data buffers is the same as the direction ratio. A key management unit supplies keys according to the selected direction to the AES cores. Multiple AES cores may be used.

    Iteration dependent bitwise bit flipping decoder

    公开(公告)号:US12034455B2

    公开(公告)日:2024-07-09

    申请号:US17947635

    申请日:2022-09-19

    申请人: PetalO Inc.

    IPC分类号: H03M13/00 H03M13/11

    摘要: An LDPC decoder receives channel information and performs a bit flipping algorithm to correct unsatisfied checks with respect to a parity matrix H. The threshold condition for determining whether to flip a bit is a function of the channel information itself. A threshold Thk used to evaluate the threshold condition may vary between iterations based on the number of iterations, number of bits flipped in the previous iteration, and number of unsatisfied checks. A threshold Thki may be calculated for each bit position. Thki and the threshold condition may be a function of whether bit position i was flipped in a previous iteration. A binning approach for parameters of the threshold condition may be used to reduce hardware complexity.

    Overprovisioning Block Mapping for Namespace

    公开(公告)号:US20240192881A1

    公开(公告)日:2024-06-13

    申请号:US18078364

    申请日:2022-12-09

    申请人: PetaIO Inc.

    IPC分类号: G06F3/06 G06F12/10

    摘要: A namespace is a declarative region that provides a scope to identifiers inside the namespace, which identifiers are the names of types, functions, variables, and the like. Namespaces are used to organize code into logical groups. A namespace is a collection of logical block addresses that are accessible to host software. The logical block addresses that comprise a namespace may be utilized to minimize overhead with smaller allocation of resources for multiple namespaces in SSD and to improve the operation of the OS by eliminating the need for defragmentation operations.

    Mitigating Edge Layer Effect In Partially Written Blocks

    公开(公告)号:US20230115979A1

    公开(公告)日:2023-04-13

    申请号:US17499571

    申请日:2021-10-12

    申请人: PetaIO Inc.

    摘要: A storage device includes 3D NAND including layers of multi-level cells. When a shutdown command is received, whether a block is partially written is evaluated. If so, dummy lines are written after the last written wordline of the block. Partially written blocks may be those having a fill percentage less than a threshold. The threshold may be a function of the PEC count of the block. If a maximum retention time is exceeded by data stored in a partially written block, dummy lines may also be written to the block.

    Bit flipping decoder using channel information

    公开(公告)号:US12047093B2

    公开(公告)日:2024-07-23

    申请号:US17940878

    申请日:2022-09-08

    申请人: PetalO Inc.

    IPC分类号: H03M13/00 H03M13/11 H03M13/37

    摘要: An LDPC decoder receives channel information and performs a bit flipping algorithm to correct unsatisfied checks with respect to a parity matrix H. The threshold condition for determining whether to flip a bit is a function of the channel information itself. A threshold Thk used to evaluate the threshold condition may vary between iterations based on the number of iterations, number of bits flipped in the previous iteration, and number of unsatisfied checks. A threshold Thki may be calculated for each bit position. Thki and the threshold condition may be a function of whether bit position i was flipped in a previous iteration. A binning approach for parameters of the threshold condition may be used to reduce hardware complexity.