Bit flipping decoder using channel information

    公开(公告)号:US12047093B2

    公开(公告)日:2024-07-23

    申请号:US17940878

    申请日:2022-09-08

    申请人: PetalO Inc.

    IPC分类号: H03M13/00 H03M13/11 H03M13/37

    摘要: An LDPC decoder receives channel information and performs a bit flipping algorithm to correct unsatisfied checks with respect to a parity matrix H. The threshold condition for determining whether to flip a bit is a function of the channel information itself. A threshold Thk used to evaluate the threshold condition may vary between iterations based on the number of iterations, number of bits flipped in the previous iteration, and number of unsatisfied checks. A threshold Thki may be calculated for each bit position. Thki and the threshold condition may be a function of whether bit position i was flipped in a previous iteration. A binning approach for parameters of the threshold condition may be used to reduce hardware complexity.

    Iteration dependent bitwise bit flipping decoder

    公开(公告)号:US12034455B2

    公开(公告)日:2024-07-09

    申请号:US17947635

    申请日:2022-09-19

    申请人: PetalO Inc.

    IPC分类号: H03M13/00 H03M13/11

    摘要: An LDPC decoder receives channel information and performs a bit flipping algorithm to correct unsatisfied checks with respect to a parity matrix H. The threshold condition for determining whether to flip a bit is a function of the channel information itself. A threshold Thk used to evaluate the threshold condition may vary between iterations based on the number of iterations, number of bits flipped in the previous iteration, and number of unsatisfied checks. A threshold Thki may be calculated for each bit position. Thki and the threshold condition may be a function of whether bit position i was flipped in a previous iteration. A binning approach for parameters of the threshold condition may be used to reduce hardware complexity.

    Bit Flipping Decoder Using Channel Information

    公开(公告)号:US20240097704A1

    公开(公告)日:2024-03-21

    申请号:US17940878

    申请日:2022-09-08

    申请人: PetalO Inc.

    IPC分类号: H03M13/11 H03M13/37

    摘要: An LDPC decoder receives channel information and performs a bit flipping algorithm to correct unsatisfied checks with respect to a parity matrix H. The threshold condition for determining whether to flip a bit is a function of the channel information itself. A threshold Thk used to evaluate the threshold condition may vary between iterations based on the number of iterations, number of bits flipped in the previous iteration, and number of unsatisfied checks. A threshold Thki may be calculated for each bit position. Thki and the threshold condition may be a function of whether bit position i was flipped in a previous iteration. A binning approach for parameters of the threshold condition may be used to reduce hardware complexity.

    Adaptive read disturb algorithm for NAND storage accounting for layer-based effect

    公开(公告)号:US11581058B2

    公开(公告)日:2023-02-14

    申请号:US17322543

    申请日:2021-05-17

    申请人: PetalO Inc.

    摘要: A storage device includes 3D NAND including layers of multi-level cells. Test reads are performed by reading only LSB pages and reading layers in a repeating pattern of reading two and skipping two. A test read of a block is performed when its read count reaches a threshold. The counter threshold is updated according to errors detected during the test read such that the frequency of test reads increases with increase in errors detected. Counter thresholds according to errors may be specified in a table. The table may be selected as corresponding to a range of PEC values including the current PEC count of the 3D NAND. Each table further specifies a number of errors that will result in garbage collection being performed.

    Adaptive Read Disturb Algorithm For Nand Storage Accounting For Layer-Based Effect

    公开(公告)号:US20220366999A1

    公开(公告)日:2022-11-17

    申请号:US17322543

    申请日:2021-05-17

    申请人: PetalO Inc.

    摘要: A storage device includes 3D NAND including layers of multi-level cells. Test reads are performed by reading only LSB pages and reading layers in a repeating pattern of reading two and skipping two. A test read of a block is performed when its read count reaches a threshold. The counter threshold is updated according to errors detected during the test read such that the frequency of test reads increases with increase in errors detected. Counter thresholds according to errors may be specified in a table. The table may be selected as corresponding to a range of PEC values including the current PEC count of the 3D NAND. Each table further specifies a number of errors that will result in garbage collection being performed.