公开(公告)号：US20140048855A1

公开(公告)日：2014-02-20

申请号：US13588060

申请日：2012-08-17

Applicant: Yu-Lien Huang ,  Chun-Fu Cheng

Inventor： Yu-Lien Huang ,  Chun-Fu Cheng

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/66636 ,  H01L21/02118 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/7834 ,  H01L29/7848

Abstract: A semiconductor device and a method for fabricating the semiconductor device are disclosed. A gate stack is formed over a substrate. A spacer is formed adjoining a sidewall of the gate stack. A recess is formed between the spacer and the substrate. Then, a strained feature is formed in the recess. The disclosed method provides an improved method by providing a space between the spacer and the substrate for forming the strained feature, therefor, to enhance carrier mobility and upgrade the device performance.

Abstract translation: 公开了一种用于制造半导体器件的半导体器件和方法。 栅极叠层形成在衬底上。 形成邻接栅叠层侧壁的间隔物。 在间隔件和基板之间形成凹部。 然后，在凹部中形成应变特征。 所公开的方法通过在间隔物和衬底之间提供形成应变特征的空间来提供改进的方法，从而增强载体移动性并提高装置性能。

公开(公告)号：US08912608B2

公开(公告)日：2014-12-16

申请号：US13588060

申请日：2012-08-17

Applicant: Yu-Lien Huang ,  Chun-Fu Cheng

Inventor： Yu-Lien Huang ,  Chun-Fu Cheng

IPC: H01L27/088

CPC classification number: H01L29/66636 ,  H01L21/02118 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/7834 ,  H01L29/7848

Abstract: A semiconductor device and a method for fabricating the semiconductor device are disclosed. A gate stack is formed over a substrate. A spacer is formed adjoining a sidewall of the gate stack. A recess is formed between the spacer and the substrate. Then, a strained feature is formed in the recess. The disclosed method provides an improved method by providing a space between the spacer and the substrate for forming the strained feature, therefor, to enhance carrier mobility and upgrade the device performance.

Abstract translation: 公开了一种用于制造半导体器件的半导体器件和方法。 栅极叠层形成在衬底上。 形成邻接栅叠层侧壁的间隔物。 在间隔件和基板之间形成凹部。 然后，在凹部中形成应变特征。 所公开的方法通过在间隔物和衬底之间提供形成应变特征的空间来提供改进的方法，从而增强载体移动性并提高装置性能。

公开(公告)号：US08859380B2

公开(公告)日：2014-10-14

申请号：US12944104

申请日：2010-11-11

Applicant: Zhiqiang Wu ,  Yi-Ming Sheu ,  Tsung-Hsing Yu ,  Kuan-Lun Cheng ,  Chih-Pin Tsao ,  Wen-Yuan Chen ,  Chun-Fu Cheng ,  Chih-Ching Wang

Inventor： Zhiqiang Wu ,  Yi-Ming Sheu ,  Tsung-Hsing Yu ,  Kuan-Lun Cheng ,  Chih-Pin Tsao ,  Wen-Yuan Chen ,  Chun-Fu Cheng ,  Chih-Ching Wang

IPC: H01L29/76 ,  H01L21/8234

CPC classification number: H01L21/26586 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823425 ,  H01L21/823468 ,  H01L29/66492 ,  H01L29/66545 ,  H01L29/66575

Abstract: A method of forming an integrated circuit includes forming a plurality of gate structures longitudinally arranged along a first direction over a substrate. A plurality of angle ion implantations are performed to the substrate. Each of the angle ion implantations has a respective implantation angle with respect to a second direction. The second direction is substantially parallel with a surface of the substrate and substantially orthogonal to the first direction. Each of the implantation angles is substantially larger than 0°.

Abstract translation: 形成集成电路的方法包括：在衬底上形成沿着第一方向纵向布置的多个栅极结构。 对基板执行多个角度离子注入。 每个角度离子注入相对于第二方向具有相应的注入角度。 第二方向基本上平行于衬底的表面并且基本上与第一方向正交。 每个注入角度基本上大于0°。