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    PACKAGE ON PACKAGE USING THROUGH SUBSTRATE VIAS
    6.
    发明申请
    PACKAGE ON PACKAGE USING THROUGH SUBSTRATE VIAS 审中-公开
    包装使用通过基板VIAS的包装

    公开(公告)号：US20130001797A1

    公开(公告)日：2013-01-03

    申请号：US13531289

    申请日：2012-06-22

    申请人： Yun-seok Choi ,  Hee-seok Lee ,  Tae-je Cho

    发明人： Yun-seok Choi ,  Hee-seok Lee ,  Tae-je Cho

    IPC分类号： H01L23/498

    CPC分类号： H01L25/105 ,  H01L23/13 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331

    摘要： A package on package (PoP) employing a through substrate via (TSV) technique in order to reduce the size of a semiconductor chip, has vertically narrow pitches, and forms a higher number of connection terminals. The PoP include a first substrate with a recess disposed in a first surface of the substrate, and a semiconductor chip disposed at the recess. The PoP also includes a semiconductor package connected to the first semiconductor package. The first substrate includes TSVs for electronically connecting the semiconductor package and the semiconductor chip, and routing lines for re-distributing the signals/and or power transmitted via the TSVs.

    摘要翻译： 为了减小半导体芯片的尺寸，采用直通衬底通孔（TSV）技术的封装（PoP）具有垂直窄的间距，并且形成更多数量的连接端子。 PoP包括具有设置在基板的第一表面中的凹部的第一基板和设置在凹部处的半导体芯片。 PoP还包括连接到第一半导体封装的半导体封装。 第一衬底包括用于电连接半导体封装和半导体芯片的TSV以及用于重新分配通过TSV传输的信号和/或功率的路由线。

    Interconnection substrate, semiconductor chip package including the same, and display system including the same
    7.
    发明授权
    Interconnection substrate, semiconductor chip package including the same, and display system including the same 有权
    互连基板，包括其的半导体芯片封装以及包括其的显示系统

    公开(公告)号：US08106425B2

    公开(公告)日：2012-01-31

    申请号：US11819628

    申请日：2007-06-28

    申请人： Yun-seok Choi ,  Na-rae Shin ,  Hee-seok Lee

    发明人： Yun-seok Choi ,  Na-rae Shin ,  Hee-seok Lee

    IPC分类号： H01L23/52

    CPC分类号： H05K1/165 ,  H01L2924/0002 ,  H05K1/0216 ,  H05K1/0233 ,  H05K1/0237 ,  H05K2201/09236 ,  H05K2201/09263 ,  H01L2924/00

    摘要： Example embodiments relate to an interconnection substrate and a semiconductor chip package and a display system including the same. The interconnection substrate may include a base film, a signal line provided on the base film, a power line provided on the base film as a line pattern including a plurality of bent portions, and a ground line provided on the base film in parallel with the power line. The interconnection substrate may further include a semiconductor chip provided on the base film, wherein the power, ground, and/or signal lines are electrically connected to the semiconductor chip to form a semiconductor chip package. A display system may include the above semiconductor chip package, a screen displaying an image, and a PCB generating a signal. The semiconductor chip may be connected between the PCB and the screen and relay the generated signal from the PCB to the screen. Use of the power, ground, and/or signal lines having a plurality of bent portions may reduce electromagnetic interference (EMI) within the display system.

    摘要翻译： 示例性实施例涉及互连衬底和半导体芯片封装以及包括其的显示系统。 互连基板可以包括基膜，设置在基膜上的信号线，设置在基膜上的电源线作为包括多个弯曲部的线图案，以及设置在基膜上的与线平行的接地线 电源线。 互连基板还可以包括设置在基膜上的半导体芯片，其中电源，接地和/或信号线电连接到半导体芯片以形成半导体芯片封装。 显示系统可以包括上述半导体芯片封装，显示图像的屏幕和产生信号的PCB。 半导体芯片可以连接在PCB和屏幕之间，并将产生的信号从PCB继电器传递到屏幕。 使用具有多个弯曲部分的电源，接地和/或信号线可以减少显示系统内的电磁干扰（EMI）。

    Interconnection substrate, semiconductor chip package including the same, and display system including the same
    8.
    发明申请
    Interconnection substrate, semiconductor chip package including the same, and display system including the same 有权
    互连基板，包括其的半导体芯片封装以及包括其的显示系统

    公开(公告)号：US20080023844A1

    公开(公告)日：2008-01-31

    申请号：US11819628

    申请日：2007-06-28

    申请人： Yun-seok Choi ,  Na-rae Shin ,  Hee-seok Lee

    发明人： Yun-seok Choi ,  Na-rae Shin ,  Hee-seok Lee

    IPC分类号： H01L23/52

    CPC分类号： H05K1/165 ,  H01L2924/0002 ,  H05K1/0216 ,  H05K1/0233 ,  H05K1/0237 ,  H05K2201/09236 ,  H05K2201/09263 ,  H01L2924/00

    摘要： Example embodiments relate to an interconnection substrate and a semiconductor chip package and a display system including the same. The interconnection substrate may include a base film, a signal line provided on the base film, a power line provided on the base film as a line pattern including a plurality of bent portions, and a ground line provided on the base film in parallel with the power line. The interconnection substrate may further include a semiconductor chip provided on the base film, wherein the power, ground, and/or signal lines are electrically connected to the semiconductor chip to form a semiconductor chip package. A display system may include the above semiconductor chip package, a screen displaying an image, and a PCB generating a signal. The semiconductor chip may be connected between the PCB and the screen and relay the generated signal from the PCB to the screen. Use of the power, ground, and/or signal lines having a plurality of bent portions may reduce electromagnetic interference (EMI) within the display system.

    摘要翻译： 示例性实施例涉及互连衬底和半导体芯片封装以及包括其的显示系统。 互连基板可以包括基膜，设置在基膜上的信号线，设置在基膜上的电源线作为包括多个弯曲部的线图案，以及设置在基膜上的与线平行的接地线 电源线。 互连基板还可以包括设置在基膜上的半导体芯片，其中电源，接地和/或信号线电连接到半导体芯片以形成半导体芯片封装。 显示系统可以包括上述半导体芯片封装，显示图像的屏幕和产生信号的PCB。 半导体芯片可以连接在PCB和屏幕之间，并将产生的信号从PCB继电器传递到屏幕。 使用具有多个弯曲部分的电源，接地和/或信号线可以减少显示系统内的电磁干扰（EMI）。