公开(公告)号：US20110164391A1

公开(公告)日：2011-07-07

申请号：US12775341

申请日：2010-05-06

Applicant: Yee Na SHIN ,  Tae Sung JEONG ,  Young Ki LEE ,  Seung Eun LEE

Inventor： Yee Na SHIN ,  Tae Sung JEONG ,  Young Ki LEE ,  Seung Eun LEE

IPC: H05K1/18 ,  H05K3/00

CPC classification number: H05K3/445 ,  H01L23/13 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2224/73267 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4641 ,  H05K2201/09745 ,  H05K2201/09772 ,  H05K2201/10674 ,  H05K2203/0191 ,  H05K2203/0315 ,  H01L2924/00

Abstract: Disclosed herein is an electronic component-embedded printed circuit board, including: a metal substrate including an anodic oxide film formed over the entire surface thereof; two electronic components disposed in a cavity formed in the metal substrate in two stages; an insulation layer formed on both sides of the metal substrate to bury the electronic components disposed in the cavity; and circuit layers including vias connected with connecting terminals of the electronic components and formed on the exposed surfaces of the insulation layer. The electronic component-embedded printed circuit board is advantageous in that its radiation performance of radiating the heat generated from an electronic component can be improved, and its production cost can be reduced, because a metal substrate is used instead of a conventional insulating material.

Abstract translation: 这里公开了一种电子部件嵌入式印刷电路板，包括：金属基板，包括在其整个表面上形成的阳极氧化膜; 设置在形成在金属基板中的空腔中的两个电子部件分两级; 形成在所述金属基板的两侧的绝缘层，以埋置设置在所述空腔中的电子部件; 以及电路层，包括与电子部件的连接端子连接并形成在绝缘层的暴露表面上的通孔。 电子元件嵌入式印刷电路板的优点在于，由于使用金属基板代替传统的绝缘材料，因此可以提高其辐射电子元件产生的热量的辐射性能，并且可以降低其制造成本。

公开(公告)号：US20150084089A1

公开(公告)日：2015-03-26

申请号：US14555186

申请日：2014-11-26

Applicant: Young Ki LEE ,  Seog Moon CHOI ,  Sang Hyun SHIN

Inventor： Young Ki LEE ,  Seog Moon CHOI ,  Sang Hyun SHIN

IPC: H01L33/48 ,  H01L33/62

CPC classification number: H01L33/486 ,  H01L33/60 ,  H01L33/62 ,  H05K3/28 ,  H05K2203/0315 ,  H05K2203/0542

Abstract: An insulation structure for high temperature conditions and a manufacturing method thereof. In the insulation structure, a substrate has a conductive pattern formed on at least one surface thereof for electrical connection of a device. A metal oxide layer pattern is formed on a predetermined portion of the conductive pattern by anodization, the metal oxide layer pattern made of one selected from a group consisting of Al, Ti and Mg.

Abstract translation: 一种用于高温条件的绝缘结构及其制造方法。 在绝缘结构中，衬底具有形成在其至少一个表面上的用于电连接器件的导电图案。 通过阳极氧化在导电图案的预定部分上形成金属氧化物层图案，金属氧化物层图案由选自Al，Ti和Mg的一种形成。

公开(公告)号：US20120273558A1

公开(公告)日：2012-11-01

申请号：US13540504

申请日：2012-07-02

Applicant: Hye Sook SHIN ,  Seog Moon CHOI ,  Shan GAO ,  Chang Hyun LIM ,  Tae Hyun KIM ,  Young Ki LEE

Inventor： Hye Sook SHIN ,  Seog Moon CHOI ,  Shan GAO ,  Chang Hyun LIM ,  Tae Hyun KIM ,  Young Ki LEE

IPC: B23K1/20

CPC classification number: H05K7/205 ,  H05K1/0209 ,  H05K1/0263 ,  H05K1/053 ,  H05K3/202 ,  H05K3/24 ,  H05K3/341 ,  H05K2201/066 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49155

Abstract: Disclosed is a heat dissipating circuit board, which includes a metal core including an insulating layer formed on the surface thereof, a circuit layer formed on the insulating layer and including a seed layer and a first circuit pattern, and a heat dissipating frame layer bonded onto the circuit layer using solder and having a second circuit pattern, and in which the heat dissipating frame layer is bonded onto the circuit layer not by a plating process but by using solder, thus reducing the cost and time of the plating process and relieving stress applied to the heat dissipating circuit board due to the plating process. A method of manufacturing the heat dissipating circuit board is also provided.

Abstract translation: 公开了一种散热电路板，其包括金属芯，该金属芯包括在其表面上形成的绝缘层，形成在绝缘层上的电路层，包括种子层和第一电路图案，以及散热框架层， 使用焊料并具有第二电路图案的电路层，其中散热框架层不是通过电镀工艺而是通过使用焊料结合到电路层上，因此降低了电镀工艺的成本和时间并减轻了施加的应力 由于电镀过程而导致散热电路板。 还提供了制造散热电路板的方法。

公开(公告)号：US20130026616A1

公开(公告)日：2013-01-31

申请号：US13557834

申请日：2012-07-25

Applicant: Suk Ho LEE ,  Jae Cheon DOH ,  Young Hoon KWAK ,  Tae Hoon KIM ,  Tao Jyun KIM ,  Young Ki LEE

Inventor： Suk Ho LEE ,  Jae Cheon DOH ,  Young Hoon KWAK ,  Tae Hoon KIM ,  Tao Jyun KIM ,  Young Ki LEE

IPC: H01L23/495 ,  H01L21/60

CPC classification number: H01L23/4334 ,  H01L23/3107 ,  H01L23/49575 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2225/1017 ,  H01L2225/1047 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1515 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015

Abstract: The present invention relates to a power device package module and a manufacturing method thereof. In one aspect of the present invention, a power device package module includes: a control unit a first lead frame, a control chip and a first coupling portion that are mounted on a first substrate, wherein the first lead frame and the first coupling portion are electrically connected to the control chip, and individually molded; and a power unit including a second lead frame, a power chip and a second coupling portion that are mounted on a second substrate, wherein the second lead frame and the second coupling portion are electrically connected to the power chip, and individually molded, wherein the individually molded control unit and power unit are coupled by the first coupling portion and the second coupling portion.

Abstract translation: 功率器件封装模块及其制造方法技术领域本发明涉及功率器件封装模块及其制造方法。 在本发明的一个方面，功率器件封装模块包括：控制单元，安装在第一衬底上的第一引线框架，控制芯片和第一耦合部分，其中第一引线框架和第一耦合部分是 电连接到控制芯片，并单独模制; 以及功率单元，其包括安装在第二基板上的第二引线框架，功率芯片和第二耦合部分，其中所述第二引线框架和所述第二耦合部分电连接到所述功率芯片，并且分别模制，其中 单独模制的控制单元和动力单元通过第一联接部分和第二联接部分联接。

公开(公告)号：US20100279803A1

公开(公告)日：2010-11-04

申请号：US12770266

申请日：2010-04-29

Applicant: Young Ki LEE

Inventor： Young Ki LEE

IPC: F42B6/08 ,  F42B6/06

CPC classification number: F42B6/06 ,  F42B6/08

Abstract: Disclosed herein is an arrow for hunting. The arrow includes an arrow shaft having a predetermined length and including a nock on one end and a shaft threaded part in the other end. A plurality of feathers is positioned to be adjacent to the nock of the arrow shaft. A connector includes a connecting threaded part fastened to the shaft threaded part, a stopper, and a penetration threaded part. An arrowhead is connected to the connector in such a way as to be opposite to the connecting threaded part. A penetration rotary unit has a threaded part to be fastened to the penetration threaded part of the connector, is shorter than the penetration threaded part, and has wings. A spring is positioned between the stopper and the penetration rotary unit, and provides a restoring force to bias the penetration rotary unit toward the arrowhead.

Abstract translation: 这里公开了一种狩猎的箭头。 箭头包括具有预定长度的箭头轴，并且在另一端包括一端的一个孔和一个轴螺纹部分。 多个羽毛被定位成与箭头轴的nock相邻。 连接器包括紧固到轴螺纹部分的连接螺纹部分，止动件和穿透螺纹部分。 箭头以与连接螺纹部分相对的方式连接到连接器。 穿透旋转单元具有要紧固到连接器的穿透螺纹部分的螺纹部分，比穿透螺纹部分短，并且具有翼部。 弹簧定位在止动器和穿透旋转单元之间，并且提供恢复力以将穿透旋转单元偏向箭头。

公开(公告)号：US20130270689A1

公开(公告)日：2013-10-17

申请号：US13550067

申请日：2012-07-16

Applicant: Kwang Soo KIM ,  Young Ki LEE ,  Bum Seok SUH ,  Kee Ju UM ,  Suk Ho LEE ,  Young Hoon KWAK

Inventor： Kwang Soo KIM ,  Young Ki LEE ,  Bum Seok SUH ,  Kee Ju UM ,  Suk Ho LEE ,  Young Hoon KWAK

IPC: H01L23/36

CPC classification number: H01L23/36 ,  H01L23/4334 ,  H01L23/473 ,  H01L23/49562 ,  H01L23/49575 ,  H01L25/043 ,  H01L2224/32221 ,  H01L2224/32245 ,  H01L2224/4141 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/00 ,  H01L2224/37099

Abstract: Provided are a semiconductor package capable of packaging and modularizing power semiconductor devices which are difficult to integrate due to heat generation, a semiconductor package module using the same, and a mounting structure thereof. The semiconductor package includes: a common connection terminal formed to have a flat plate shape; first and second electronic devices respectively bonded to both surfaces of the common connection terminals; first and second connection terminals having a flat plate shape and bonded to the first electronic device; and a third connection terminal having a flat plate shape and bonded to the second electronic device.

Abstract translation: 提供了能够封装和模块化由于发热而难以集成的功率半导体器件的半导体封装，使用其的半导体封装模块及其安装结构。 半导体封装包括：形成为具有平板形状的公共连接端子; 第一和第二电子设备分别接合到公共连接端子的两个表面; 第一和第二连接端子具有平板形状并且结合到第一电子设备; 以及具有平板形状并结合到第二电子设备的第三连接端子。

公开(公告)号：US20110312109A1

公开(公告)日：2011-12-22

申请号：US13220258

申请日：2011-08-29

Applicant: Young Ki LEE ,  Seog Moon CHOI ,  Sang Hyun SHIN

Inventor： Young Ki LEE ,  Seog Moon CHOI ,  Sang Hyun SHIN

IPC: H01L33/48

CPC classification number: H01L33/483 ,  H01L25/0753 ,  H01L33/58 ,  H01L33/62 ,  H01L33/641 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An LED package having an anodized insulation layer which increases heat radiation effect to prolong the lifetime LEDs and maintains high luminance and high output, and a method therefor. The LED package includes an Al substrate having a reflecting region and a light source mounted on the substrate and connected to patterned electrodes. The package also includes an anodized insulation layer formed between the patterned electrodes and the substrate and a lens covering over the light source of the substrate. The Al substrate provides superior heat radiation effect of the LED, thereby significantly increasing the lifetime and light emission efficiency of the LED.

Abstract translation: 一种具有阳极氧化绝缘层的LED封装，其方法为增加散热效果以延长寿命LED并保持高亮度和高输出。 LED封装包括具有反射区域的Al衬底和安装在衬底上并连接到图案化电极的光源。 封装还包括形成在图案化电极和衬底之间的阳极化绝缘层和覆盖在衬底的光源上的透镜。 Al衬底提供了LED的优异的散热效果，从而显着增加了LED的寿命和发光效率。

公开(公告)号：US20110075374A1

公开(公告)日：2011-03-31

申请号：US12618726

申请日：2009-11-14

Applicant: Jung Eun KANG ,  Seog Moon CHOI ,  Tae Hoon KIM ,  Young Ki LEE ,  Hye Sook SHIN ,  Chang Hyun LIM

Inventor： Jung Eun KANG ,  Seog Moon CHOI ,  Tae Hoon KIM ,  Young Ki LEE ,  Hye Sook SHIN ,  Chang Hyun LIM

IPC: H05K7/20 ,  H05K1/00 ,  H05K3/10

CPC classification number: H05K3/4641 ,  H05K1/0203 ,  H05K1/053 ,  H05K1/189 ,  H05K3/462 ,  H05K3/4691 ,  H05K2203/0315 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: Disclosed is a rigid-flexible circuit board, which includes a rigid region and a flexible region, the rigid region including a flexible substrate having a first circuit layer on both surfaces thereof, a metal core substrate formed on the flexible substrate and having a second circuit layer on both surfaces thereof, and an adhesive layer disposed between the flexible substrate and the metal core substrate, wherein the metal core substrate includes a metal core having a through hole, and an insulating layer formed on a surface of the metal core, so that the rigid region and the flexible region are thermally separated from each other and heat dissipation properties of the rigid region are improved. A method of manufacturing the rigid-flexible circuit board is also provided.

Abstract translation: 公开了一种刚性柔性电路板，其包括刚性区域和柔性区域，所述刚性区域包括在其两个表面上具有第一电路层的柔性基板，形成在柔性基板上的金属芯基板，并具有第二电路 并且设置在柔性基板和金属芯基板之间的粘合层，其中金属芯基板包括具有通孔的金属芯和形成在金属芯的表面上的绝缘层，使得 刚性区域和柔性区域彼此热分离，改善了刚性区域的散热性能。 还提供了制造刚性柔性电路板的方法。

公开(公告)号：US20110067902A1

公开(公告)日：2011-03-24

申请号：US12614405

申请日：2009-11-07

Applicant: Hye Sook SHIN ,  Seog Moon CHOI ,  Shan GAO ,  Chang Hyun LIM ,  Tae Hyun KIM ,  Young Ki LEE

Inventor： Hye Sook SHIN ,  Seog Moon CHOI ,  Shan GAO ,  Chang Hyun LIM ,  Tae Hyun KIM ,  Young Ki LEE

IPC: H05K1/00 ,  H05K7/20

CPC classification number: H05K7/205 ,  H05K1/0209 ,  H05K1/0263 ,  H05K1/053 ,  H05K3/202 ,  H05K3/24 ,  H05K3/341 ,  H05K2201/066 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49155

Abstract: Disclosed is a heat dissipating circuit board, which includes a metal core including an insulating layer formed on the surface thereof, a circuit layer formed on the insulating layer and including a seed layer and a first circuit pattern, and a heat dissipating frame layer bonded onto the circuit layer using solder and having a second circuit pattern, and in which the heat dissipating frame layer is bonded onto the circuit layer not by a plating process but by using solder, thus reducing the cost and time of the plating process and relieving stress applied to the heat dissipating circuit board due to the plating process. A method of manufacturing the heat dissipating circuit board is also provided.

Abstract translation: 公开了一种散热电路板，其包括金属芯，该金属芯包括在其表面上形成的绝缘层，形成在绝缘层上的电路层，包括种子层和第一电路图案，以及散热框架层， 使用焊料并具有第二电路图案的电路层，其中散热框架层不是通过电镀工艺而是通过使用焊料结合到电路层上，因此降低了电镀工艺的成本和时间并减轻了施加的应力 由于电镀过程而导致散热电路板。 还提供了制造散热电路板的方法。

公开(公告)号：US20130069108A1

公开(公告)日：2013-03-21

申请号：US13313713

申请日：2011-12-07

Applicant: Young Ki LEE ,  Dong Soo SEO ,  Kwang Soo KIM ,  Young Hoon KWAK

Inventor： Young Ki LEE ,  Dong Soo SEO ,  Kwang Soo KIM ,  Young Hoon KWAK

IPC: H01L29/739

CPC classification number: H01L23/4824 ,  H01L29/7393 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Disclosed herein is a power semiconductor module including: a circuit board having gate, emitter, and collector patterns formed thereon; a first semiconductor chip mounted on the circuit board, having gate and emitter terminals each formed on one surface thereof, and having a collector terminal formed on the other surface thereof; a second semiconductor chip mounted on the first semiconductor chip, having a cathode terminal formed on one surface thereof, and having an anode terminal formed on the other surface thereof; a first conductive connection member having one end disposed between the collector terminal of the first semiconductor chip and the cathode terminal of the second semiconductor chip and the other end contacting the collector pattern of the circuit board; and a second conductive connection member having one end contacting the anode terminal of the second semiconductor chip and the other end contacting the emitter pattern of the circuit board.

Abstract translation: 本文公开了一种功率半导体模块，包括：电路板，其上形成有栅极，发射极和集电极图案; 安装在所述电路板上的第一半导体芯片，在其一个表面上形成有栅极和发射极端子，并且在其另一个表面上形成集电极端子; 安装在所述第一半导体芯片上的第二半导体芯片，具有在其一个表面上形成的阴极端子，并且在其另一个表面上形成阳极端子; 第一导电连接构件，其一端设置在第一半导体芯片的集电极端子和第二半导体芯片的阴极端子之间，另一端接触电路板的集电体图案; 以及第二导电连接构件，其一端接触第二半导体芯片的阳极端子，另一端接触电路板的发射极图案。