公开(公告)号：US20200111808A1

公开(公告)日：2020-04-09

申请号：US16194311

申请日：2018-11-17

申请人： YANGTZE MEMORY TECHNOLOGIES CO., LTD.

发明人： Fandong Liu ,  Wenyu Hua ,  Jia He ,  Linchen Wu ,  Yue Qiang Pu ,  Zhiliang Xia

IPC分类号： H01L27/11582 ,  H01L27/11556 ,  H01L23/535 ,  H01L21/311 ,  H01L21/768

摘要： Embodiments of 3D memory devices with a dielectric etch stop layer and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a dielectric etch stop layer disposed on the substrate, a memory stack disposed on the dielectric etch stop layer and including a plurality of interleaved conductor layers and dielectric layers, and a plurality of memory strings each extending vertically through the memory stack and including a selective epitaxial growth (SEG) plug in a bottom portion of the memory string. The SEG plug is disposed on the substrate.

公开(公告)号：US10804283B2

公开(公告)日：2020-10-13

申请号：US16046475

申请日：2018-07-26

申请人： Yangtze Memory Technologies Co., Ltd.

发明人： Jia He ,  Haihui Huang ,  Fandong Liu ,  Yaohua Yang ,  Peizhen Hong ,  Zhiliang Xia ,  Zongliang Huo ,  Yaobin Feng ,  Baoyou Chen ,  Qingchen Cao

IPC分类号： H01L27/1157 ,  H01L27/11578 ,  H01L29/66 ,  H01L29/792 ,  H01L21/28 ,  H01L27/11582

摘要： Embodiments of semiconductor devices and methods for forming the semiconductor devices are disclosed. In an example, a method for forming device openings includes forming a material layer over a first region and a second region of a substrate, the first region being adjacent to the second region, forming a mask layer over the material layer, the mask layer covering the first region and the second region, and forming a patterning layer over the mask layer. The patterning layer covers the first region and the second region and including openings corresponding to the first region. The plurality of openings includes a first opening adjacent to a boundary between the first region and the second region and a second opening further away from the boundary. Along a plane parallel to a top surface of the substrate, a size of the first opening is greater than a size of the second opening.

公开(公告)号：US20190013327A1

公开(公告)日：2019-01-10

申请号：US16046475

申请日：2018-07-26

申请人： Yangtze Memory Technologies Co., Ltd.

发明人： Jia He ,  Haihui Huang ,  Fandong Liu ,  Yaohua Yang ,  Peizhen Hong ,  Zhiliang Xia ,  Zongliang Huo ,  Yaobin Feng ,  Baoyou Chen ,  Qingchen Cao

IPC分类号： H01L27/11578 ,  H01L27/1157 ,  H01L29/792 ,  H01L29/66 ,  H01L21/28

摘要： Embodiments of semiconductor devices and methods for forming the semiconductor devices are disclosed. In an example, a method for forming device openings includes forming a material layer over a first region and a second region of a substrate, the first region being adjacent to the second region, forming a mask layer over the material layer, the mask layer covering the first region and the second region, and forming a patterning layer over the mask layer. The patterning layer covers the first region and the second region and including openings corresponding to the first region. The plurality of openings includes a first opening adjacent to a boundary between the first region and the second region and a second opening further away from the boundary. Along a plane parallel to a top surface of the substrate, a size of the first opening is greater than a size of the second opening.

公开(公告)号：US10651192B2

公开(公告)日：2020-05-12

申请号：US16046814

申请日：2018-07-26

申请人： Yangtze Memory Technologies Co., Ltd.

发明人： Qiang Xu ,  Fandong Liu ,  Zongliang Huo ,  Zhiliang Xia ,  Yaohua Yang ,  Peizhen Hong ,  Wenyu Hua ,  Jia He

IPC分类号： H01L27/11582 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11565 ,  H01L27/1157 ,  H01L21/02 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L27/11568 ,  H01L29/08 ,  H01L29/10 ,  H01L21/285 ,  H01L21/3105 ,  H01L21/311 ,  H01L23/532

摘要： Methods and structures of a three-dimensional memory device are disclosed. In an example, the memory device includes a substrate, a first tier of conductor layers of a first length comprising a first plurality of conductor layers extending along a first direction over the substrate. The first direction is substantially parallel to a top surface of the substrate. In some embodiments, the memory device also includes at least one connection portion conductively connecting two or more conductor layers of the first tier, and a first metal contact via conductively shared by connected conductor layers of the first tier and connected to a first metal interconnect.

公开(公告)号：US20240107757A1

公开(公告)日：2024-03-28

申请号：US18534480

申请日：2023-12-08

申请人： YANGTZE MEMORY TECHNOLOGIES CO., LTD.

发明人： Jia He ,  Haihui Huang ,  Fandong Liu ,  Yaohua Yang ,  Peizhen Hong ,  Zhiliang Xia ,  Zongliang Huo ,  Yaobin Feng ,  Baoyou Chen ,  Qingchen Cao

IPC分类号： H10B43/20 ,  H01L21/28 ,  H01L29/66 ,  H01L29/792 ,  H10B43/27 ,  H10B43/35

CPC分类号： H10B43/20 ,  H01L29/40117 ,  H01L29/66833 ,  H01L29/792 ,  H10B43/27 ,  H10B43/35

摘要： Embodiments of semiconductor devices and methods for forming the semiconductor devices are disclosed. In an example, a method for forming device openings includes forming a material layer over a first region and a second region of a substrate, the first region being adjacent to the second region, forming a mask layer over the material layer, the mask layer covering the first region and the second region, and forming a patterning layer over the mask layer. The patterning layer covers the first region and the second region and including openings corresponding to the first region. The plurality of openings includes a first opening adjacent to a boundary between the first region and the second region and a second opening further away from the boundary. Along a plane parallel to a top surface of the substrate, a size of the first opening is greater than a size of the second opening.

公开(公告)号：US11792989B2

公开(公告)日：2023-10-17

申请号：US17509891

申请日：2021-10-25

申请人： Yangtze Memory Technologies Co., Ltd.

发明人： Qiang Xu ,  Fandong Liu ,  Zongliang Huo ,  Zhiliang Xia ,  Yaohua Yang ,  Peizhen Hong ,  Wenyu Hua ,  Jia He

IPC分类号： H10B43/27 ,  H10B43/10 ,  H10B43/30 ,  H10B43/35 ,  H10B43/40 ,  H10B43/50 ,  H01L21/02 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L29/08 ,  H01L29/10 ,  H01L21/285 ,  H01L21/3105 ,  H01L21/311 ,  H01L23/532

CPC分类号： H10B43/27 ,  H01L21/02164 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/76895 ,  H01L23/528 ,  H01L23/5226 ,  H01L29/0847 ,  H01L29/1037 ,  H10B43/10 ,  H10B43/30 ,  H10B43/35 ,  H10B43/40 ,  H10B43/50 ,  H01L21/0262 ,  H01L21/02271 ,  H01L21/28568 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/31144 ,  H01L23/53214 ,  H01L23/53228 ,  H01L23/53257

摘要： Methods and structures of a three-dimensional memory device are disclosed. In an example, the memory device comprises a substrate, a stack structure on the substrate, and at least one gate line slit extending along a first direction substantially parallel to a top surface of the substrate, and dividing the stack structure into at least two portions. The stack structure includes at least one connection portion that divides the at least one gate line slit, and conductively connects the at least two portions.

公开(公告)号：US11222903B2

公开(公告)日：2022-01-11

申请号：US16843714

申请日：2020-04-08

申请人： Yangtze Memory Technologies Co., Ltd.

发明人： Qiang Xu ,  Fandong Liu ,  Zongliang Huo ,  Zhiliang Xia ,  Yaohua Yang ,  Peizhen Hong ,  Wenyu Hua ,  Jia He

IPC分类号： H01L27/11582 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11565 ,  H01L27/1157 ,  H01L21/02 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L27/11568 ,  H01L29/08 ,  H01L29/10 ,  H01L21/285 ,  H01L21/3105 ,  H01L21/311 ,  H01L23/532

摘要： Methods and structures of a three-dimensional memory device are disclosed. In an example, the method comprises: providing a substrate; forming an alternating stack over the substrate, the alternating stack comprising a plurality of tiers of sacrificial layer/insulating layer pairs extending along a first direction substantially parallel to a top surface of the substrate; forming a plurality of tiers of word lines extending along the first direction based on the alternating stack; forming at least one connection portion conductively connecting two or more of the word lines of the plurality of tiers of word lines; and forming at least one metal contact via conductively shared by connected word lines, the at least one metal contact via being connected to at least one metal interconnect.

公开(公告)号：US20200381451A1

公开(公告)日：2020-12-03

申请号：US16994493

申请日：2020-08-14

申请人： YANGTZE MEMORY TECHNOLOGIES CO., LTD.

发明人： Fandong Liu ,  Wenyu Hua ,  Jia He ,  Linchen Wu ,  Yue Qiang Pu ,  Zhiliang Xia

IPC分类号： H01L27/11582 ,  H01L21/311 ,  H01L21/768 ,  H01L23/535 ,  H01L27/11556

摘要： Embodiments of 3D memory devices with a dielectric etch stop layer and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device is disclosed. The method includes forming a dielectric etch stop layer. The dielectric etch stop is disposed on a substrate. The method also includes forming a dielectric stack on the dielectric etch stop layer. The dielectric stack includes a plurality of interleaved dielectric layers and sacrificial layers. The method further includes forming an opening extending vertically through the dielectric stack and extending the opening through the dielectric etch stop layer. In addition, the method includes forming a selective epitaxial growth (SEG) plug at a lower portion of the opening. The SEG plug is disposed on the substrate. Moreover, the method includes forming a channel structure above and in contact with the SEG plug in the opening. The method further includes forming a memory stack comprising a plurality of interleaved dielectric layers and conductor layers by replacing the sacrificial layers in the dielectric stack with the conductor layers.

公开(公告)号：US10784279B2

公开(公告)日：2020-09-22

申请号：US16194311

申请日：2018-11-17

申请人： YANGTZE MEMORY TECHNOLOGIES CO., LTD.

发明人： Fandong Liu ,  Wenyu Hua ,  Jia He ,  Linchen Wu ,  Yue Qiang Pu ,  Zhiliang Xia

IPC分类号： H01L27/11582 ,  H01L21/311 ,  H01L21/768 ,  H01L23/535 ,  H01L27/11556 ,  H01L21/02

摘要： Embodiments of 3D memory devices with a dielectric etch stop layer and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a dielectric etch stop layer disposed on the substrate, a memory stack disposed on the dielectric etch stop layer and including a plurality of interleaved conductor layers and dielectric layers, and a plurality of memory strings each extending vertically through the memory stack and including a selective epitaxial growth (SEG) plug in a bottom portion of the memory string. The SEG plug is disposed on the substrate.

公开(公告)号：US11903195B2

公开(公告)日：2024-02-13

申请号：US18156619

申请日：2023-01-19

申请人： Yangtze Memory Technologies Co., Ltd.

发明人： Jia He ,  Haihui Huang ,  Fandong Liu ,  Yaohua Yang ,  Peizhen Hong ,  Zhiliang Xia ,  Zongliang Huo ,  Yaobin Feng ,  Baoyou Chen ,  Qingchen Cao

IPC分类号： H10B43/20 ,  H01L29/66 ,  H01L29/792 ,  H10B43/27 ,  H10B43/35 ,  H01L21/28

CPC分类号： H10B43/20 ,  H01L29/40117 ,  H01L29/66833 ,  H01L29/792 ,  H10B43/27 ,  H10B43/35

摘要： Embodiments of semiconductor devices and methods for forming the semiconductor devices are disclosed. In an example, a method for forming device openings includes forming a material layer over a first region and a second region of a substrate, the first region being adjacent to the second region, forming a mask layer over the material layer, the mask layer covering the first region and the second region, and forming a patterning layer over the mask layer. The patterning layer covers the first region and the second region and including openings corresponding to the first region. The plurality of openings includes a first opening adjacent to a boundary between the first region and the second region and a second opening further away from the boundary. Along a plane parallel to a top surface of the substrate, a size of the first opening is greater than a size of the second opening.