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公开(公告)号:US20240407168A1
公开(公告)日:2024-12-05
申请号:US18378513
申请日:2023-10-10
Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Inventor: Quan Zhang , Lei Xue , Yanwei Shi , Wenshan Xu , Chao Sun , Liang Chen , Boru Xie
Abstract: The present disclosure provides a semiconductor device and a manufacturing method thereof, as well as a memory system. The semiconductor device includes a first semiconductor structure comprising a first well region and transistors in the first well region, and a second semiconductor structure bonded with the first semiconductor structure and including a second well region, and fin field effect transistors in the second well region. Each fin field effect transistor includes a fin structure, a gate oxide layer in contact with a top surface and side surfaces of the fin structure, and a gate layer covering the gate oxide layer.
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公开(公告)号:US20240292625A1
公开(公告)日:2024-08-29
申请号:US18323957
申请日:2023-05-25
Applicant: Yangtze Memory Technologies Co., Ltd.
Inventor: Quan Zhang , Lan Yao , Boru Xie , Jie Yan
IPC: H10B43/35 , H01L21/8234 , H01L27/088 , H01L29/66 , H01L29/78 , H10B41/20 , H10B41/35 , H10B43/20
CPC classification number: H10B43/35 , H01L21/823431 , H01L21/823481 , H01L27/0886 , H01L29/66795 , H01L29/7851 , H10B41/20 , H10B41/35 , H10B43/20
Abstract: Examples of the present application provide a semiconductor device, a fabrication method thereof, a 3D memory and a memory device, wherein the semiconductor device includes: a substrate including first fins and second fins; a first gate oxide layer disposed on the first fins; a second gate oxide layer disposed on the second fins, wherein the sum of the thicknesses of the first fin and the first gate oxide layer is less than or equal to the sum of the thicknesses of the second fin and the second gate oxide layer; and a gate layer disposed on the first gate oxide layer and the second gate oxide layer. In the way described above, difficulty of etching process is reduced and yield and performance of products are improved.
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公开(公告)号:US20240164117A1
公开(公告)日:2024-05-16
申请号:US18148805
申请日:2022-12-30
Applicant: Yangtze Memory Technologies Co., Ltd.
Inventor: Quan Zhang , Yanwei Shi , Lan Yao , Cheng Chen , Boru Xie , Jing Li
IPC: H10B80/00
CPC classification number: H10B80/00
Abstract: The present disclosure provides an example semiconductor devices and fabrication methods thereof, and memory systems. In one example, the semiconductor device includes: a first chip including a first type of transistor that is planar transistor and a second chip bound on the first chip in the first direction. The second chip includes a second type of transistor that is fin transistor. The semiconductor device and the fabrication method thereof, and the memory system provided in the present disclosure can mitigate the bulk effect between transistors in adjacent two chips. Other examples are disclosed.
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