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公开(公告)号：US20180374439A1
公开(公告)日：2018-12-27
申请号：US15737211
申请日：2017-06-27
Inventor： Liang MA , WEI-PING YEH , Cong WANG , Zuomin LIAO , Jun XIA
IPC: G09G3/36 , H01L27/12 , G02F1/1362
Abstract: A display pixel structure includes a plurality of pixel units arranged in an array. Each of the pixel units comprises the first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel. Each of the sub-pixels includes a TFT switch. A ratio between a width/length ratio of the TFT switch of one of the first sub-pixel, the second sub-pixel, and the third sub-pixel or an average of width/length ratios of multiple TFT switches thereof and a width/length ratio of the TFT switch of the fourth sub-pixel is equal to a ratio between a storage capacitance of one of the first sub-pixel, the second sub-pixel, and the third sub-pixel or an average of multiple storage capacitances thereof and a storage capacitance of the fourth sub-pixel. An array substrate and a liquid crystal display device are also disclosed.
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公开(公告)号：US20180364503A1
公开(公告)日：2018-12-20
申请号：US15535656
申请日：2017-04-07
Inventor： Cheng CHEN , Liang MA
IPC: G02F1/136 , H01L27/12 , H01L29/06 , H01L29/786 , H01L29/66
Abstract: The present invention provides a TFT array substrate, comprising a substrate and a TFT switch formed on the substrate, and the TFT switch comprises a polysilicon layer, a gate, a first lightly doped region and a heavily doped region, and the polysilicon layer comprises two opposite extending sections and a main section connecting ends of the two extending sections, and the gate is disposed across the two extending sections, and the heavy doped region is formed in the main section of the polysilicon layer and at one side of the gate, and the first lightly doped region is formed at the middle of the heavily doped region.
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Patent Agency Ranking
公开(公告)号：US20180308402A1
公开(公告)日：2018-10-25
申请号：US15533458
申请日：2017-05-12
Inventor： Liang MA
CPC classification number: G09G3/006 , G01N2021/9513 , G02F1/1309 , G09G3/3611 , G09G2300/0452
Abstract: The disclosure discloses a lighting jig of a display panel and a lighting test method. The lighting jig includes a signal generator configured to generate a plurality of control signals and a first digital signal, a controller connected with the signal generator and configured to light up subpixels corresponding to the control signals of corresponding rows in the display panel when an effective signal of the control signals and an effective signal of the first digital signal work simultaneously. The plurality of control signals are corresponding to the plurality of subpixels in each column of pixels respectively. In each period, temporal positions of the effective signal of the control signals corresponding to the subpixels required to be lit on and the effective signal of the first digital signal are identical. The sequence design of adopting special control signals and digital signals can prevent mischarging other subpixels during digital signal delay.
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公开(公告)号：US20170343873A1
公开(公告)日：2017-11-30
申请号：US15204906
申请日：2016-07-07
Inventor： Liang MA
IPC: G02F1/1362 , G02F1/1333 , G02F1/1368
CPC classification number: G02F1/136213 , G02F1/133345 , G02F1/13338 , G02F1/136227 , G02F1/1368 , G02F2001/133357 , G02F2001/134318 , G02F2201/121 , G02F2201/123
Abstract: The present application discloses an array substrate, a liquid crystal display panel and a liquid crystal display device; a metal layer is designed to be added between the pixel electrode and the common electrode. The metal layer can form a first storage capacitor with the pixel electrode and formed a second storage capacitor with the common electrode, such as the dual storage capacitors to enlarge the storage capacitor to improve the flicker caused by TFT leakage, ensure the display effect, and the two storage capacitor are overlapped set, the aperture ratio of the pixel is not reduced.
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公开(公告)号：US20180108285A1
公开(公告)日：2018-04-19
申请号：US15111765
申请日：2016-06-12
IPC: G09G3/00 , G02F1/1368 , G01R31/26
CPC classification number: G09G3/006 , G01R31/2632 , G01R31/2637 , G02F1/1368 , G02F2001/136254 , G09G3/00 , G09G2310/0251 , G09G2310/0297 , G09G2310/08 , G09G2320/0209 , G09G2320/0219 , G09G2320/0223 , G09G2330/12
Abstract: A testing circuit includes at least one sub-circuit. The sub-circuit includes a first input end, at least one second input end, at least one third input end, and at least one driving output end. The first switch unit includes controllable switches. The second switch unit includes sub-units and first inverters. The sub-unit includes transmission gates. The control end of the controllable switch connects to the second input end, the first end connects to the first input end, and the second end connects to the input end of the transmission gate. The first control end of the transmission gate connects to the third input end and the input end of the first inverter, the second control end connects to the output end of the first inverter, the output end connects to the driving output end.
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公开(公告)号：US20180292865A1
公开(公告)日：2018-10-11
申请号：US15525582
申请日：2017-04-13
Inventor： Zuomin LIAO , Liang MA
Abstract: The present disclosure relates to a mobile terminal having a Home button and a display panel thereof. The display panel includes:a display area and an external pin bonding area configured below the display area, wherein a down edge of the external pin bonding area connects to a flexible printed circuit (FPC). A slot is configured on the FPC, and the Home button is configured on a top of the slot. The slot is configured to prevent the Home button from being overlapped with at least one electrical connection area of the FPC and the external pin bonding area when the Home button is pressed, so as to avoid influence on an electrical connection of the FPC and the external pin bonding area.
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公开(公告)号：US20180210249A1
公开(公告)日：2018-07-26
申请号：US15326551
申请日：2017-01-07
IPC: G02F1/1368 , H01L29/786 , G02F1/1362
CPC classification number: G02F1/1368 , G02F1/134363 , G02F1/1362 , G02F1/136209 , G02F1/136213 , G02F1/136227 , G02F2001/134372 , G02F2001/13685 , H01L29/78609 , H01L29/78624 , H01L29/78633 , H01L29/7869 , H01L29/78696
Abstract: The present disclosure relates to a display panel including a first substrate, a second substrate, a liquid crystal layer between the first substrate and the second substrate, a masking layer on the first substrate, a buffering layer arranged on the masking layer and the first substrate, a first semiconductor layer on the buffering layer, and an active layer on the first semiconductor layer and the buffering layer. The present disclosure also relates to a display device. With such configuration, the leakage current of the TFTs may be reduced, which also reduces the cross-talk and the flicker of the liquid crystal panel.
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