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    Semiconductor device having insulating film with increased tensile stress and manufacturing method thereof
    1.
    发明授权
    Semiconductor device having insulating film with increased tensile stress and manufacturing method thereof 有权
    具有拉伸应力增加的绝缘膜的半导体装置及其制造方法

    公开(公告)号：US08492847B2

    公开(公告)日：2013-07-23

    申请号：US13341421

    申请日：2011-12-30

    Applicant: Tatsunori Murata ,  Yuki Koide

    Inventor： Tatsunori Murata ,  Yuki Koide

    IPC: H01L21/70 ,  H01L21/4763

    CPC classification number: H01L29/7843 ,  H01L21/2686 ,  H01L21/28518 ,  H01L21/76802 ,  H01L21/76825 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76837 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7833

    Abstract: Over a semiconductor substrate, a silicon nitride film is formed so as to cover n-channel MISFETs. The silicon nitride film is a laminate film which may be made of first, second, and third silicon nitride films. The total film thickness of the first and second silicon nitride films is smaller than half a spacing between a first sidewall spacer and a second sidewall spacer. After being deposited, the first and second silicon nitride films are subjected to treatments to have increased tensile stresses. The total film thickness of the first, second, and third silicon nitride films is not less than half the spacing between the first and second sidewall spacers. The third silicon nitride film is not subjected to any tensile-stress-increasing treatment, or may be subjected to a lesser amount of such treatment.

    Abstract translation: 在半导体衬底上形成氮化硅膜以覆盖n沟道MISFET。 氮化硅膜是可由第一，第二和第三氮化硅膜制成的层压膜。 第一和第二氮化硅膜的总膜厚度小于第一侧壁间隔物和第二侧壁间隔物之间​​的间隔的一半。 沉积后，对第一和第二氮化硅膜进行处理以增加拉伸应力。 第一，第二和第三氮化硅膜的总膜厚度不小于第一和第二侧壁间隔物之间​​的间距的一半。 第三氮化硅膜不经受任何拉伸应力增加处理，或者可以进行较少量的这种处理。

    Semiconductor Device Having Insulating Film With Increased Tensile Stress and Manufacturing Method Thereof
    2.
    发明申请
    Semiconductor Device Having Insulating Film With Increased Tensile Stress and Manufacturing Method Thereof 有权
    具有增加拉伸应力的绝缘膜的半导体器件及其制造方法

    公开(公告)号：US20120199913A1

    公开(公告)日：2012-08-09

    申请号：US13341421

    申请日：2011-12-30

    Applicant: Tatsunori Murata ,  Yuki Koide

    Inventor： Tatsunori Murata ,  Yuki Koide

    IPC: H01L27/092 ,  H01L21/28 ,  H01L27/088

    CPC classification number: H01L29/7843 ,  H01L21/2686 ,  H01L21/28518 ,  H01L21/76802 ,  H01L21/76825 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76837 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7833

    Abstract: Over a semiconductor substrate, a silicon nitride film is formed so as to cover n-channel MISFETs. The silicon nitride film is a laminate film which may be made of first, second, and third silicon nitride films. The total film thickness of the first and second silicon nitride films is smaller than half a spacing between a first sidewall spacer and a second sidewall spacer. After being deposited, the first and second silicon nitride films are subjected to treatments to have increased tensile stresses. The total film thickness of the first, second, and third silicon nitride films is not less than half the spacing between the first and second sidewall spacers. The third silicon nitride film is not subjected to any tensile-stress-increasing treatment, or may be subjected to a lesser amount of such treatment.

    Abstract translation: 在半导体衬底上形成氮化硅膜以覆盖n沟道MISFET。 氮化硅膜是可由第一，第二和第三氮化硅膜制成的层压膜。 第一和第二氮化硅膜的总膜厚度小于第一侧壁间隔物和第二侧壁间隔物之间​​的间隔的一半。 沉积后，对第一和第二氮化硅膜进行处理以增加拉伸应力。 第一，第二和第三氮化硅膜的总膜厚度不小于第一和第二侧壁间隔物之间​​的间距的一半。 第三氮化硅膜不经受任何拉伸应力增加处理，或者可以进行较少量的这种处理。

    Semiconductor device and method of manufacturing same
    4.
    发明授权
    Semiconductor device and method of manufacturing same 失效
    半导体装置及其制造方法

    公开(公告)号：US07977183B2

    公开(公告)日：2011-07-12

    申请号：US12605328

    申请日：2009-10-24

    Applicant: Yuki Koide

    Inventor： Yuki Koide

    IPC: H01L21/8234

    CPC classification number: H01L21/823807 ,  H01L29/7843

    Abstract: To provide a technique capable of improving the reliability of a semiconductor device even if the downsizing thereof is advanced.The technical idea of the present invention lies in the configuration in which in a first to a third silicon nitride film to be formed by lamination, the respective film thicknesses thereof are not constant but become smaller in order from the third silicon nitride film in the upper layer to the first silicon nitride film in the lower layer while the total film thickness thereof is kept constant. Due to this it is possible to improve the embedding characteristic of the third silicon nitride film in the uppermost layer in particular, while ensuring the tensile stress of the first to third silicon nitride films, which makes effective the strained silicon technique.

    Abstract translation: 为了提供能够提高半导体装置的可靠性的技术，即使其小型化也是前进的。 本发明的技术思想在于，在通过层叠形成的第一至第三氮化硅膜中，其各自的膜厚度不是恒定的，而是从上部的第三氮化硅膜的顺序变小 层到下层中的第一氮化硅膜，而其总膜厚度保持恒定。 由此，可以在确保第一至第三氮化硅膜的拉伸应力的同时，特别提高最上层的第三氮化硅膜的嵌入特性，这使得应变硅技术变得有效。

    Semiconductor device and method of manufacturing same
    7.
    发明授权
    Semiconductor device and method of manufacturing same 有权
    半导体装置及其制造方法

    公开(公告)号：US08779522B2

    公开(公告)日：2014-07-15

    申请号：US13175819

    申请日：2011-07-01

    Applicant: Yuki Koide

    Inventor： Yuki Koide

    IPC: H01L27/088 ,  H01L29/78 ,  H01L21/8238

    CPC classification number: H01L21/823807 ,  H01L29/7843

    Abstract: To provide a technique capable of improving the reliability of a semiconductor device even if the downsizing thereof is advanced.The technical idea of the present invention lies in the configuration in which in a first to a third silicon nitride film to be formed by lamination, the respective film thicknesses thereof are not constant but become smaller in order from the third silicon nitride film in the upper layer to the first silicon nitride film in the lower layer while the total film thickness thereof is kept constant. Due to this it is possible to improve the embedding characteristic of the third silicon nitride film in the uppermost layer in particular, while ensuring the tensile stress of the first to third silicon nitride films, which makes effective the strained silicon technique.

    Abstract translation: 为了提供能够提高半导体装置的可靠性的技术，即使其小型化也是前进的。 本发明的技术思想在于，在通过层叠形成的第一至第三氮化硅膜中，其各自的膜厚度不是恒定的，而是从上部的第三氮化硅膜的顺序变小 层到下层中的第一氮化硅膜，而其总膜厚度保持恒定。 由此，可以在确保第一至第三氮化硅膜的拉伸应力的同时，特别提高最上层的第三氮化硅膜的嵌入特性，这使得应变硅技术变得有效。

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