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230 条记录 (耗时 0.057 秒)

    Semiconductor memory device
    1.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号：US08699262B2

    公开(公告)日：2014-04-15

    申请号：US13270299

    申请日：2011-10-11

    申请人： Takao Watanabe ,  Satoru Hanzawa ,  Yoshitaka Sasago

    发明人： Takao Watanabe ,  Satoru Hanzawa ,  Yoshitaka Sasago

    IPC分类号： G11C11/24

    CPC分类号： H01L45/06 ,  G11C13/0004 ,  G11C13/003 ,  G11C13/0069 ,  G11C2213/71 ,  G11C2213/72 ,  G11C2213/75 ,  G11C2213/78 ,  G11C2213/79 ,  H01L27/2481

    摘要： Adverse effects of a parasitic resistance and a parasitic capacitance of a driver circuit to a memory cell causes problems of thermal disturbance to a not-selected cell, unevenness of application voltage, degradation of a memory element in reading. A capacitor (C) is provided above or beneath a memory cell (MC) that includes a memory element to which a current write memory information and a selection element connected to the memory element. A charge stored in this capacitor writes to the memory element.

    摘要翻译： 驱动电路的寄生电阻和寄生电容对存储单元的不利影响引起对未选择单元的热扰动，施加电压的不均匀性，读取中存储元件的劣化的问题。 电容器（C）设置在存储单元（MC）的上方或下方，存储单元（MC）包括与存储元件连接的当前写入存储器信息和选择元件的存储元件。 存储在该电容器中的电荷写入存储器元件。

    Millimeter wave radar-equipped headlamp
    7.
    发明授权
    Millimeter wave radar-equipped headlamp 有权
    毫米波雷达配备的前大灯

    公开(公告)号：US08803728B2

    公开(公告)日：2014-08-12

    申请号：US13105350

    申请日：2011-05-11

    申请人： Naruto Yonemoto ,  Akiko Kohmura ,  Yoshiki Kurosawa ,  Takao Watanabe ,  Satoshi Yamamura

    发明人： Naruto Yonemoto ,  Akiko Kohmura ,  Yoshiki Kurosawa ,  Takao Watanabe ,  Satoshi Yamamura

    IPC分类号： G01S13/00 ,  B60Q1/00 ,  F21V7/00

    CPC分类号： H01Q1/3225 ,  B60Q1/0023 ,  G01S7/03 ,  G01S13/931 ,  G01S2013/9396 ,  H01Q1/3283 ,  H01Q5/22 ,  H01Q19/062 ,  H01Q19/134

    摘要： A millimeter wave radar-equipped headlamp includes a millimeter wave radar that detects an object ahead of a vehicle, and a lighting device unit that irradiates an area ahead of the vehicle. The lighting device unit incorporates an antenna module of the millimeter wave radar. The lighting device unit includes a projection lens, a light source, a reflector, and a shade. The antenna module includes a millimeter wave waveguide, and a millimeter wave reflection mirror. A reflection surface of the millimeter wave reflection mirror is formed by a spheroidal surface having a first focal point located in the vicinity of the opening of the millimeter wave waveguide, and a second focal point located forward of the rear focal point.

    摘要翻译： 配备有毫米波雷达的前照灯包括：检测车辆前方的物体的毫米波雷达;以及照射装置单元，其照射车辆前方的区域。 照明装置单元包括毫米波雷达的天线模块。 照明装置单元包括投影透镜，光源，反射器和阴影。 天线模块包括毫米波波导和毫米波反射镜。 毫米波反射镜的反射面由具有位于毫米波导的开口附近的第一焦点的球形表面和位于后焦点的前方的第二焦点形成。

    Semiconductor integrated circuit device
    8.
    发明授权
    Semiconductor integrated circuit device 失效
    半导体集成电路器件

    公开(公告)号：US07848177B2

    公开(公告)日：2010-12-07

    申请号：US12269098

    申请日：2008-11-12

    申请人： Shinya Kajiyama ,  Yutaka Shinagawa ,  Makoto Mizuno ,  Hideo Kasai ,  Takao Watanabe ,  Riichiro Takemura ,  Tomonori Sekiguchi

    发明人： Shinya Kajiyama ,  Yutaka Shinagawa ,  Makoto Mizuno ,  Hideo Kasai ,  Takao Watanabe ,  Riichiro Takemura ,  Tomonori Sekiguchi

    IPC分类号： G11C8/00

    CPC分类号： G11C7/1039 ,  G11C7/1075 ,  G11C16/26

    摘要： The semiconductor integrated circuit device includes: a first latch which can hold an output signal of the X decoder and transfer the signal to the word driver in a post stage subsequent to the X decoder; a second latch which can hold an output signal of the Y decoder and transfer the signal to the column multiplexer in the post stage subsequent to the Y decoder; and a third latch which can hold an output signal of the sense amplifier and transfer the signal to the output buffer in the post stage subsequent to the sense amplifier. The structure makes it possible to pipeline-control a series of processes for reading data stored in the non-volatile semiconductor memory, and enables low-latency access even with access requests from CPUs conflicting.

    摘要翻译： 半导体集成电路装置包括：第一锁存器，其可以保持X解码器的输出信号，并且在X解码器之后的后级中将信号传送到字驱动器; 第二锁存器，其可以保持Y解码器的输出信号，并且在Y解码器之后的后级中将信号传送到列多路复用器; 以及第三锁存器，其可以保持读出放大器的输出信号，并且在读出放大器之后的后级中将该信号传送到输出缓冲器。 该结构使得可以对一系列用于读取存储在非易失性半导体存储器中的数据的处理进行管线控制，并且即使在来自CPU的访问请求冲突的情况下也能够进行低延迟访问。

    METHOD FOR CHARGING WITH LIQUEFIED AMMONIA, METHOD FOR PRODUCING NITRIDE CRYSTAL, AND REACTOR FOR GROWTH OF NITRIDE CRYSTAL
    9.
    发明申请
    METHOD FOR CHARGING WITH LIQUEFIED AMMONIA, METHOD FOR PRODUCING NITRIDE CRYSTAL, AND REACTOR FOR GROWTH OF NITRIDE CRYSTAL 有权
    用液化氨水充填的方法，生产氮化物晶体的方法和硝酸晶体生长的反应物

    公开(公告)号：US20100294195A1

    公开(公告)日：2010-11-25

    申请号：US12681517

    申请日：2008-09-24

    申请人： Yuuichi Katou ,  Takao Watanabe ,  Kazunori Hiruta

    发明人： Yuuichi Katou ,  Takao Watanabe ,  Kazunori Hiruta

    IPC分类号： C30B11/00 ,  B01J3/04 ,  F17C6/00 ,  F25J1/00

    CPC分类号： C30B7/10 ,  C30B29/403

    摘要： A method for charging with liquefied ammonia comprising sequentially a feeding step of feeding gaseous ammonia in a condenser, a liquefaction step of converting the gaseous ammonia into a liquefied ammonia in the condenser, and a charging step of feeding the liquefied ammonia formed in the condenser to a vessel to thereby charge the vessel with the liquefied ammonia wherein a cooling step of feeding the liquefied ammonia formed in the condenser to the vessel and cooling the vessel by the latent heat of vaporization of the liquefied ammonia and a circulation step of feeding the gaseous ammonia formed through vaporization of the liquefied ammonia in the previous cooling step to the condenser are carried out between the liquefaction step and the charging step.

    摘要翻译： 一种用液化氨填充的方法，包括依次在冷凝器中进料气态氨的进料步骤，在冷凝器中将气态氨转化成液化氨的液化步骤，以及将在冷凝器中形成的液化氨进料的加料步骤 容器，由此用液化氨对容器充电，其中将冷凝器中形成的液化氨进料到容器并通过液氨的蒸发潜热冷却容器的冷却步骤和供给气态氨的循环步骤 在液化步骤和充电步骤之间进行在先前的冷却步骤中将液氨化合物蒸发形成至冷凝器。

    Semiconductor device
    10.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US07813156B2

    公开(公告)日：2010-10-12

    申请号：US12242164

    申请日：2008-09-30

    申请人： Hiroyuki Mizuno ,  Takeshi Sakata ,  Nobuhiro Oodaira ,  Takao Watanabe ,  Yusuke Kanno

    发明人： Hiroyuki Mizuno ,  Takeshi Sakata ,  Nobuhiro Oodaira ,  Takao Watanabe ,  Yusuke Kanno

    IPC分类号： G11C5/06

    CPC分类号： G11C11/4076 ,  G11C7/04 ,  G11C7/065 ,  G11C7/08 ,  G11C7/12 ,  G11C7/18 ,  G11C11/4091 ,  G11C11/4094 ,  G11C11/4097 ,  G11C2207/002 ,  G11C2207/005

    摘要： The present invention provides a sense circuit for DRAM memory cell to cover the events that a sense time becomes remarkably longer when a power source voltage is lowered, a sense time under the low voltage condition becomes shorter when temperature rises and a sense time changes to a large extent for fluctuation of processes. The present invention provides the following typical effects. A switch means is provided between the bit line BL and local bit line LBL connected to the memory cells for isolation and coupling of these bit lines. The bit line BL is precharged to the voltage of VDL/2, while the local bit line LBL is precharged to the voltage of VDL. The VDL is the maximum amplitude voltage of the bit line BL. A sense amplifier SA comprises a first circuit including a differential MOS pair having the gate connected to the bit line BL and a second circuit connected to the local bit line LBL for full amplitude amplification and for holding the data. When the bit line BL and local bit line LBL are capacitance-coupled via a capacitor, it is recommended to use a latch type sense amplifier SA connected to bit line LBL.

    摘要翻译： 本发明提供了一种用于DRAM存储单元的感测电路，以覆盖当电源电压降低时感测时间变得显着更长的事件，当温度升高时，低电压条件下的感测时间变短，感测时间变为 过程波动很大程度。 本发明提供以下典型的效果。 在位线BL和连接到存储器单元的局部位线LBL之间提供开关装置，用于这些位线的隔离和耦合。 位线BL被预充电到VDL / 2的电压，而局部位线LBL被预充电到VDL的电压。 VDL是位线BL的最大幅度电压。 读出放大器SA包括第一电路，其包括具有连接到位线BL的栅极的差分MOS对，以及连接到用于全幅放大的局部位线LBL并用于保持该数据的第二电路。 当位线BL和本地位线LBL通过电容器电容耦合时，建议使用连接到位线LBL的锁存型读出放大器SA。