公开(公告)号：US09425157B2

公开(公告)日：2016-08-23

申请号：US14190360

申请日：2014-02-26

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Wei-Hung Lin ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Yu-Min Liang ,  Chen-Shien Chen ,  Chung-Shi Liu

IPC分类号： H01L23/48 ,  H01L23/00

CPC分类号： H01L24/17 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/13005 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/16013 ,  H01L2224/16104 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/1703 ,  H01L2224/17104 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/207

摘要： According to an exemplary embodiment, a substrate having a first area and a second area is provided. The substrate includes a plurality of pads. Each of the pads has a pad size. The pad size in the first area is larger than the pad size in the second area.

摘要翻译： 根据示例性实施例，提供具有第一区域和第二区域的基板。 基板包括多个焊盘。 每个垫具有垫尺寸。 第一区域中的焊盘尺寸大于第二区域中的焊盘尺寸。

公开(公告)号：US11824032B2

公开(公告)日：2023-11-21

申请号：US17205669

申请日：2021-03-18

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Wei-Yu Chen ,  Chi-Yang Yu ,  Kuan-Lin Ho ,  Chin-Liang Chen ,  Yu-Min Liang ,  Jiun Yi Wu

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L25/065 ,  H01L21/56

CPC分类号： H01L24/20 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3185 ,  H01L23/3192 ,  H01L24/16 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L24/14 ,  H01L2224/13 ,  H01L2224/13024 ,  H01L2224/14131 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/19 ,  H01L2224/2101 ,  H01L2224/221 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73209 ,  H01L2224/73217 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/1431 ,  H01L2924/1437

摘要： A chip package structure includes a fan-out package containing at least one semiconductor die, an epoxy molding compound (EMC) die frame laterally surrounding the at least one semiconductor die, and a redistribution structure. The fan-out package has chamfer regions at which horizontal surfaces and vertical surfaces of the fan-out package are connected via angled surfaces that are not horizontal and not vertical. The chip package structure may include a package substrate that is attached to the fan-out package via an array of solder material portions, and an underfill material portion that laterally surrounds the array of solder material portions and contacts an entirety of the angled surfaces. The angled surfaces eliminate a sharp corner at which mechanical stress may be concentrated, and distribute local mechanical stress in the chamfer regions over a wide region to prevent cracks in the underfill material portion.

公开(公告)号：US20230307345A1

公开(公告)日：2023-09-28

申请号：US17864564

申请日：2022-07-14

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Hao-Cheng Hou ,  Tsung-Ding Wang ,  Jung Wei Cheng ,  Yu-Min Liang

IPC分类号： H01L23/498 ,  H01L25/16 ,  H01L21/48 ,  H01L23/538

CPC分类号： H01L23/49838 ,  H01L25/162 ,  H01L21/4853 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/5381 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/16

摘要： An assembly including at least one semiconductor die and an interposer is provided. A packaging substrate including substrate bonding pads is provided. The packaging substrate includes a first horizontal surface facing the assembly, a second horizontal surface located on an opposite side of the first horizontal surface, and an opening extending between the first horizontal surface and the second horizontal surface. The assembly is attached to the packaging substrate by bonding first solder material portions bonded to a respective one of the substrate bonding pads and to a respective one of first interposer bonding pads located on the interposer.