公开(公告)号：US10943820B2

公开(公告)日：2021-03-09

申请号：US16414273

申请日：2019-05-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wan-Yi Kao ,  Wei-Jin Li ,  Chung-Chi Ko ,  Yu-Cheng Shiau ,  Han-Sheng Weng ,  Chih-Tang Peng ,  Tien-I Bao

IPC: H01L21/768 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/02 ,  H01L21/762

Abstract: A method for forming a semiconductor structure is provided. The method includes patterning a semiconductor substrate to form a first semiconductor fin and a second semiconductor fin adjacent to the first semiconductor fin, and depositing a first dielectric material on the first semiconductor fin and the second semiconductor fin on the semiconductor substrate using an atomic layer deposition process. There is a first trench between the first semiconductor fin and the second semiconductor fin. The method also includes filling the first trench with a flowable dielectric material, and heating the flowable dielectric material and the first dielectric material to form an isolation structure between the first semiconductor fin and the second semiconductor fin.

公开(公告)号：US12266728B2

公开(公告)日：2025-04-01

申请号：US18591730

申请日：2024-02-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wan-Yi Kao ,  Yu-Cheng Shiau ,  Chunyao Wang ,  Chih-Tang Peng ,  Yung-Cheng Lu ,  Chi On Chui

IPC: H01L29/78 ,  H01L21/02 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/51 ,  H01L29/66

Abstract: A semiconductor device and method of manufacture are provided. In embodiments a first liner is deposited to line a recess between a first semiconductor fin and a second semiconductor fin, the first liner comprising a first material. The first liner is annealed to transform the first material to a second material. A second liner is deposited to line the recess, the second liner comprising a third material. The second liner is annealed to transform the third material to a fourth material.

公开(公告)号：US20240087947A1

公开(公告)日：2024-03-14

申请号：US18152477

申请日：2023-01-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Ting Ko ,  Yu-Cheng Shiau ,  Li-Jung Kuo ,  Sung-En Lin ,  Kuo-Chin Liu

IPC: H01L21/762 ,  H01L21/02 ,  H01L21/311 ,  H01L29/06

CPC classification number: H01L21/762 ,  H01L21/0217 ,  H01L21/02252 ,  H01L21/31116 ,  H01L29/0684

Abstract: A semiconductor device and method of manufacture are provided. In some embodiments isolation regions are formed by modifying a dielectric material of a dielectric layer such that a first portion of the dielectric layer is more readily removed by an etching process than a second portion of the dielectric layer. The modifying of the dielectric material facilitates subsequent processing steps that allow for the tuning of a profile of the isolation regions to a desired geometry based on the different material properties of the modified dielectric material.

公开(公告)号：US20240429313A1

公开(公告)日：2024-12-26

申请号：US18476619

申请日：2023-09-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Cheng Shiau ,  Chung-Ting Ko ,  Ting-Hsiang Chang ,  Shu Ling Liao ,  Sung-En Lin ,  Tai-Chun Huang ,  Tze-Liang Lee

IPC: H01L29/775 ,  H01L21/02 ,  H01L21/306 ,  H01L27/088 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/786

Abstract: A method includes etching a semiconductor region aside of a gate stack to form a recess, forming a dielectric layer at a bottom of the recess, selectively forming a first semiconductor layer at the bottom of the recess, and epitaxially growing a second semiconductor layer on the first semiconductor layer. A bottom surface of the first semiconductor layer forms an interface with a top surface of the dielectric layer, with the interface extending to opposing sides of the recess. The selectively forming the first semiconductor layer comprises a first deposition process performed under first process conditions. The second semiconductor layer is formed using a second deposition process under second process conditions. The second process conditions are different from the first process conditions.

公开(公告)号：US20220029011A1

公开(公告)日：2022-01-27

申请号：US17157330

申请日：2021-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wan-Yi Kao ,  Yu-Cheng Shiau ,  Chunyao Wang ,  Chih-Tang Peng ,  Yung-Cheng Lu ,  Chi On Chui

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/51

Abstract: A semiconductor device and method of manufacture are provided. In embodiments a first liner is deposited to line a recess between a first semiconductor fin and a second semiconductor fin, the first liner comprising a first material. The first liner is annealed to transform the first material to a second material. A second liner is deposited to line the recess, the second liner comprising a third material. The second liner is annealed to transform the third material to a fourth material.

公开(公告)号：US20240204104A1

公开(公告)日：2024-06-20

申请号：US18591730

申请日：2024-02-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wan-Yi Kao ,  Yu-Cheng Shiau ,  Chunyao Wang ,  Chih-Tang Peng ,  Yung-Cheng Lu ,  Chi On Chui

IPC: H01L29/78 ,  H01L21/02 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L21/0214 ,  H01L21/02211 ,  H01L21/02263 ,  H01L21/76224 ,  H01L21/76232 ,  H01L21/823481 ,  H01L27/0924 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/66818 ,  H01L21/76227

Abstract: A semiconductor device and method of manufacture are provided. In embodiments a first liner is deposited to line a recess between a first semiconductor fin and a second semiconductor fin, the first liner comprising a first material. The first liner is annealed to transform the first material to a second material. A second liner is deposited to line the recess, the second liner comprising a third material. The second liner is annealed to transform the third material to a fourth material.

公开(公告)号：US11942549B2

公开(公告)日：2024-03-26

申请号：US18064562

申请日：2022-12-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wan-Yi Kao ,  Yu-Cheng Shiau ,  Chunyao Wang ,  Chih-Tang Peng ,  Yung-Cheng Lu ,  Chi On Chui

IPC: H01L29/78 ,  H01L21/02 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L21/0214 ,  H01L21/02211 ,  H01L21/02263 ,  H01L21/76224 ,  H01L21/76232 ,  H01L21/823481 ,  H01L27/0924 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/66818 ,  H01L21/76227

Abstract: A semiconductor device and method of manufacture are provided. In embodiments a first liner is deposited to line a recess between a first semiconductor fin and a second semiconductor fin, the first liner comprising a first material. The first liner is annealed to transform the first material to a second material. A second liner is deposited to line the recess, the second liner comprising a third material. The second liner is annealed to transform the third material to a fourth material.

公开(公告)号：US20230238271A1

公开(公告)日：2023-07-27

申请号：US17729546

申请日：2022-04-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Cheng Shiau

IPC: H01L21/762

CPC classification number: H01L21/76224

Abstract: Methods for forming improved isolation features in semiconductor devices and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes etching a first trench in a substrate; depositing a first insulation layer in the first trench with a first flowable chemical vapor deposition process; depositing a second insulation layer on the first insulation layer with a second flowable chemical vapor deposition process, the second flowable chemical vapor deposition process having process parameters different from the first flowable chemical vapor deposition process, and a portion of the first trench remaining unfilled by the first insulation layer and the second insulation layer; and forming an insulating fin in the portion of the first trench unfilled by the first insulation layer and the second insulation layer.

公开(公告)号：US11527653B2

公开(公告)日：2022-12-13

申请号：US17157330

申请日：2021-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wan-Yi Kao ,  Yu-Cheng Shiau ,  Chunyao Wang ,  Chih-Tang Peng ,  Yung-Cheng Lu ,  Chi On Chui

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/02 ,  H01L29/51 ,  H01L27/092 ,  H01L21/762

Abstract: A semiconductor device and method of manufacture are provided. In embodiments a first liner is deposited to line a recess between a first semiconductor fin and a second semiconductor fin, the first liner comprising a first material. The first liner is annealed to transform the first material to a second material. A second liner is deposited to line the recess, the second liner comprising a third material. The second liner is annealed to transform the third material to a fourth material.