公开(公告)号：US20230163129A1

公开(公告)日：2023-05-25

申请号：US17703329

申请日：2022-03-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsueh-Ju Chen ,  Yi Hsuan Chen ,  Jyun-Yi Wu ,  Wen-Hung Huang ,  Tsung-Da Lin ,  Jian-Hao Chen ,  Cheng-Lung Hung ,  Kuo-Feng Yu

IPC: H01L27/092 ,  H01L29/10 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238

CPC classification number: H01L27/0922 ,  H01L27/0924 ,  H01L29/1037 ,  H01L29/7851 ,  H01L29/66818 ,  H01L21/823807 ,  H01L21/823821

Abstract: In an embodiment, a device includes: an isolation region on a substrate; a first semiconductor fin protruding above the isolation region; a first gate dielectric on a first channel region of the first semiconductor fin, the first gate dielectric including a first interfacial layer and a first high-k dielectric layer; a second semiconductor fin protruding above the isolation region; and a second gate dielectric on a second channel region of the second semiconductor fin, the second gate dielectric including a second interfacial layer and a second high-k dielectric layer, a first portion of the first interfacial layer on the first channel region having a greater thickness than a second portion of the second interfacial layer on the second channel region, the second channel region having a greater height than the first channel region.

公开(公告)号：US20240332004A1

公开(公告)日：2024-10-03

申请号：US18346314

申请日：2023-07-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi On Chui ,  Cheng-Hao Hou ,  Da-Yuan Lee ,  Pei Ying Lai ,  Yi Hsuan Chen ,  Jia-Yun Xu

IPC: H01L21/02 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L21/02178 ,  H01L21/0228 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696

Abstract: A method includes forming a gate dielectric on a semiconductor region, depositing an aluminum nitride layer on the gate dielectric, depositing an aluminum oxide layer on the aluminum nitride layer, performing an annealing process to drive aluminum in the aluminum nitride layer into the gate dielectric, removing the aluminum oxide layer and the aluminum nitride layer, and forming a gate electrode on the gate dielectric.