公开(公告)号：US20170263548A1

公开(公告)日：2017-09-14

申请号：US15065310

申请日：2016-03-09

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jian-Hua CHEN ,  Tai-I YANG ,  Cheng-Chi CHUANG ,  Chia-Tien WU ,  Tien-Lu LIN ,  Tien-I BAO

IPC: H01L23/528 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L23/528 ,  H01L21/76802 ,  H01L21/76825 ,  H01L21/76834 ,  H01L21/76877 ,  H01L23/5226

Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a dielectric layer over a semiconductor substrate. The method also includes forming an opening in the dielectric layer. A dielectric constant of a first portion of the dielectric layer is less than that of a second portion of the dielectric layer surrounding the opening. The method further includes forming a conductive feature in the opening. The second portion is between the first portion and the conductive feature. In addition, the method includes modifying an upper portion of the first portion to increase the dielectric constant of the upper portion of the first portion. The method also includes removing the upper portion of the first portion and the second portion.

公开(公告)号：US20250056862A1

公开(公告)日：2025-02-13

申请号：US18932293

申请日：2024-10-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jia-Chuan YOU ,  Chia-Hao CHANG ,  Tien-Lu LIN ,  Yu-Ming LIN ,  Chih-Hao WANG

IPC: H01L29/66 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/417 ,  H01L29/78

Abstract: A method includes forming a dummy gate over a substrate. A first gate spacer is formed on a sidewall of the dummy gate. The dummy gate is replaced with a gate structure. A top portion of the first spacer is removed. After the top portion of the first spacer is removed, a second spacer is over the first spacer. The second spacer has a stepped bottom surface with an upper step in contact with a top surface of the first spacer and a lower step lower than the top surface of the first spacer. A contact plug is formed contacting the gate structure and the second spacer.

公开(公告)号：US20220181216A1

公开(公告)日：2022-06-09

申请号：US17681588

申请日：2022-02-25

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jia-Chuan YOU ,  Chia-Hao CHANG ,  Tien-Lu LIN ,  Yu-Ming LIN ,  Chih-Hao WANG

IPC: H01L21/8234 ,  H01L29/417 ,  H01L29/78 ,  H01L29/66

Abstract: A method includes forming a dummy gate over a substrate. A first gate spacer is formed on a side of the dummy gate. The dummy gate is replaced with a gate structure, such that that first gate spacer is on a side of the gate structure. The gate structure is etched back. After etching back the gate structure, a top portion of the first gate spacer is removed. A second gate spacer is formed over a remaining portion of the first gate spacer. After forming the second gate spacer, a dielectric cap is formed over the gate structure.

公开(公告)号：US20200381291A1

公开(公告)日：2020-12-03

申请号：US16947932

申请日：2020-08-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Lin-Yu HUANG ,  Sheng-Tsung WANG ,  Chia-Hao CHANG ,  Tien-Lu LIN ,  Yu-Ming LIN ,  Chih-Hao WANG

IPC: H01L21/762 ,  H01L21/311 ,  H01L27/088

Abstract: A method and structure directed to providing a source/drain isolation structure includes providing a device having a first source/drain region adjacent to a second source/drain region. A masking layer is deposited between the first and second source/drain regions and over an exposed first part of the second source/drain region. After depositing the masking layer, a first portion of an ILD layer disposed on either side of the masking layer is etched, without substantial etching of the masking layer, to expose a second part of the second source/drain region and to expose the first source/drain region. After etching the first portion of the ILD layer, the masking layer is etched to form an L-shaped masking layer. After forming the L-shaped masking layer, a first metal layer is formed over the exposed first source/drain region and a second metal layer is formed over the exposed second part of the second source/drain region.

公开(公告)号：US20190058033A1

公开(公告)日：2019-02-21

申请号：US15677089

申请日：2017-08-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Tien-Lu LIN ,  Jung-Hung CHANG

IPC: H01L29/06 ,  H01L27/092 ,  H01L21/8238

Abstract: A semiconductor device includes a substrate, a liner, and an isolation structure. The substrate has at least one first semiconductor fin and at least one second semiconductor fin. The liner is disposed on at least one sidewall of the second semiconductor fin. The isolation structure is disposed over the substrate, in which the isolation structure is in contact with the first semiconductor fin and the liner.

公开(公告)号：US20240096961A1

公开(公告)日：2024-03-21

申请号：US18520996

申请日：2023-11-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Chuan CHIU ,  Tien-Lu LIN ,  Yu-Ming LIN ,  Chia-Hao CHANG ,  Chih-Hao WANG ,  Jia-Chuan YOU

IPC: H01L29/08 ,  H01L21/768 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/0847 ,  H01L21/76871 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A contact stack of a semiconductor device includes a source/drain feature, a silicide layer wrapping around the source/drain feature, a seed metal layer in direct contact with the silicide layer, and a conductor in contact with the seed metal layer. The contact stack excludes a metal nitride layer in direct contact with the silicide layer.

公开(公告)号：US20210083046A1

公开(公告)日：2021-03-18

申请号：US16572192

申请日：2019-09-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tien-Lu LIN ,  Che-Chen WU ,  Chia-Lin CHUANG ,  Yu-Ming LIN ,  Chih-Hao CHANG

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L29/66 ,  H01L21/768 ,  H01L21/764

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a source/drain contact structure formed over a semiconductor substrate, and a first gate stack formed over the semiconductor substrate and adjacent to the source/drain contact structure. The semiconductor device structure also includes an insulating cap structure formed over and separated from an upper surface of the first gate stack. In addition, the semiconductor device structure includes first gate spacers formed over opposing sidewalls of the first gate stack to separate the first gate stack from the source/drain contact structure. The first gate spacers extend over opposing sidewalls of the insulating cap structure, so as to form an air gap surrounded by the first gate spacers, the first gate stack, and the insulating cap structure.

公开(公告)号：US20200294846A1

公开(公告)日：2020-09-17

申请号：US16353421

申请日：2019-03-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Lin-Yu HUANG ,  Jia-Chuan YOU ,  Chia-Hao CHANG ,  Tien-Lu LIN ,  Yu-Ming LIN ,  Chih-Hao WANG

IPC: H01L21/768 ,  H01L29/66 ,  H01L29/417 ,  H01L29/78

Abstract: A method for forming a fin field effect transistor device structure includes forming fin structures over a substrate. The method also includes forming a gate structure across the fin structures. The method also includes forming source/drain epitaxial structures over the fin structures. The method also includes forming blocking structures between the source/drain epitaxial structures. The method also includes depositing contact structures over the source/drain epitaxial structures and between the blocking structures. The method also includes removing a top portion of the blocking structures. The method also includes depositing an etch stop layer over the blocking structures and the contact structures, so that an air gap is formed between the etch stop layer and the blocking structure.

公开(公告)号：US20200243519A1

公开(公告)日：2020-07-30

申请号：US16257375

申请日：2019-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Li-Zhen YU ,  Tien-Lu LIN ,  Jia-Chuan YOU ,  Chia-Hao CHANG ,  Yu-Ming LIN ,  Chih-Hao WANG

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L29/51 ,  H01L21/033 ,  H01L21/8234

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first epitaxial structure and a second epitaxial structure over a semiconductor substrate. The method includes forming a dielectric layer over the first epitaxial structure, the second epitaxial structure, and the semiconductor substrate. The method includes forming a first mask layer over the dielectric layer and between the first epitaxial structure and the second epitaxial structure. The method includes forming a second mask layer over the dielectric layer and the first mask layer. The method includes partially removing the dielectric layer covering the first epitaxial structure and the second epitaxial structure. The method includes removing the first mask layer. The method includes forming a first conductive layer and a second conductive layer respectively in the first recess and the second recess.

公开(公告)号：US20200035558A1

公开(公告)日：2020-01-30

申请号：US16422559

申请日：2019-05-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuo-Cheng CHING ,  Lin-Yu HUANG ,  Huan-Chieh SU ,  Sheng-Tsung WANG ,  Zhi-Chang LIN ,  Jia-Chuan YOU ,  Chia-Hao CHANG ,  Tien-Lu LIN ,  Yu-Ming LIN ,  Chih-Hao WANG

IPC: H01L21/768 ,  H01L21/28 ,  H01L29/40 ,  H01L29/78

Abstract: A method of forming a semiconductor device includes providing a device having a gate stack including a metal gate layer. The device further includes a spacer layer disposed on a sidewall of the gate stack and a source/drain feature adjacent to the gate stack. The method further includes performing a first etch-back process to the metal gate layer to form an etched-back metal gate layer. In some embodiments, the method includes depositing a metal layer over the etched-back metal gate layer. In some cases, a semiconductor layer is formed over both the metal layer and the spacer layer to provide a T-shaped helmet layer over the gate stack and the spacer layer.