公开(公告)号：US20230110241A1

公开(公告)日：2023-04-13

申请号：US18065442

申请日：2022-12-13

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Cheng-Ming Lin ,  Peng-Soon Lim ,  Zi-Wei Fang

IPC: H01L29/417 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238

Abstract: A device includes a semiconductor channel region and a gate structure. The semiconductor channel region is on a substrate. The gate structure is over the semiconductor channel region and comprises a gate dielectric layer, a first gate conductor layer, and a second gate conductor layer. The first gate conductor layer is over the gate dielectric layer. The first gate conductor layer includes oxygen. The second gate conductor layer is over the first gate conductor layer.

公开(公告)号：US10665685B2

公开(公告)日：2020-05-26

申请号：US16059900

申请日：2018-08-09

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Cheng-Ming Lin ,  Peng-Soon Lim ,  Zi-Wei Fang

IPC: H01L29/417 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238

Abstract: A method includes forming a gate dielectric layer over a semiconductor substrate, forming a first metal element-containing layer over the gate dielectric layer, and thermal soaking the first metal element-containing layer in a first gas, such that a constituent of the first gas is diffused into the first metal element-containing layer.

公开(公告)号：US11915981B2

公开(公告)日：2024-02-27

申请号：US17826129

申请日：2022-05-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Peng-Soon Lim ,  Zi-Wei Fang

IPC: H01L21/8234 ,  H01L27/088 ,  H01L21/285 ,  H01L29/66

CPC classification number: H01L21/82345 ,  H01L21/823431 ,  H01L21/823456 ,  H01L27/0886 ,  H01L21/28562 ,  H01L21/28568 ,  H01L29/66545

Abstract: A semiconductor device includes a semiconductor substrate, a first gate structure over the substrate, a second gate structure over the substrate, first gate spacers, second gate spacers, first and second metal layers spanning over the first and second gate structures, first and second contact plugs extending through the first and second metal layers, respectively. The first gate structure includes a first gate dielectric, and a first work function metal layer over the first gate dielectric. The second gate structure is wider than the first gate structure, wherein the second gate structure includes a second gate dielectric, a second work function metal layer over the second gate dielectric, and a filling conductor over the second work function metal layer. The first contact plug is in contact with the first work function metal layer, and the second contact plug is in contact with the filling conductor.

公开(公告)号：US11855164B2

公开(公告)日：2023-12-26

申请号：US17327584

申请日：2021-05-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Cheng-Ming Lin ,  Peng-Soon Lim ,  Zi-Wei Fang

IPC: H01L29/417 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238

CPC classification number: H01L29/41791 ,  H01L21/823437 ,  H01L21/823842 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L21/823821

Abstract: A semiconductor device includes a substrate, a semiconductor fin extending from the substrate, a gate dielectric layer over the semiconductor fin, a metal nitride layer comprising a first portion over the gate dielectric layer and a second portion over the first portion, and a fill layer over the metal nitride layer. The second portion has an aluminum concentration greater than an aluminum concentration of the first portion.

公开(公告)号：US11348837B2

公开(公告)日：2022-05-31

申请号：US16914287

申请日：2020-06-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Peng-Soon Lim ,  Zi-Wei Fang

IPC: H01L21/8234 ,  H01L27/088 ,  H01L21/285 ,  H01L29/66

Abstract: A semiconductor device includes a semiconductor substrate, first gate structure, a first metal layer, a first protective layer, and a first contact plug. The first gate structure includes a plurality of first U-shaped layers stacked one another between the first gate spacers in a cross-sectional view and first gate spacers on opposite sides of the first U-shaped layers. The first metal layer is over the first U-shaped layers and has a different shape than the first U-shaped layers in the cross-sectional view. The first protective layer is over the first metal layer and between the first gate spacers. The first contact plug extends through the first protective layer and the first metal layer, and is in contact with the first gate structure.

公开(公告)号：US20210249517A1

公开(公告)日：2021-08-12

申请号：US16785919

申请日：2020-02-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Liang Cheng ,  Peng-Soon Lim ,  Ziwei Fang ,  Huang-Lin Chao

IPC: H01L29/423 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/66 ,  H01L29/49

Abstract: The present disclosure describes a semiconductor device that includes a substrate and a first transistor on the substrate. The first transistor includes a first gate structure and the first gate structure includes a gate dielectric layer and a first work function layer on the gate dielectric layer. The first gate structure also includes a capping layer on the first work function layer. The semiconductor device also includes a second transistor on the substrate, in which the second transistor includes a second gate structure. The second gate structure includes the gate dielectric layer and a second work function layer on the gate dielectric layer. The second gate structure also includes the first work function layer on the second work function layer and the silicon capping layer on the first work function layer.

公开(公告)号：US20240371973A1

公开(公告)日：2024-11-07

申请号：US18773070

申请日：2024-07-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Peng-Soon Lim ,  Cheng-Lung Hung ,  Mao-Lin Huang ,  Weng Chang

IPC: H01L29/66 ,  H01L21/28 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78

Abstract: A method includes forming a dummy gate stack, forming a dielectric layer, with the dummy gate stack located in the dielectric layer, removing the dummy gate stack to form a opening in the dielectric layer, forming a metal layer extending into the opening, and etching back the metal layer. The remaining portions of the metal layer in the opening have edges lower than a top surface of the dielectric layer. A conductive layer is selectively deposited in the opening. The conductive layer is over the metal layer, and the metal layer and the conductive layer in combination form a replacement gate.

公开(公告)号：US12107134B2

公开(公告)日：2024-10-01

申请号：US18065442

申请日：2022-12-13

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Cheng-Ming Lin ,  Peng-Soon Lim ,  Zi-Wei Fang

IPC: H01L29/417 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/41791 ,  H01L21/823437 ,  H01L21/823842 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L21/823821

Abstract: A device includes a semiconductor channel region and a gate structure. The semiconductor channel region is on a substrate. The gate structure is over the semiconductor channel region and comprises a gate dielectric layer, a first gate conductor layer, and a second gate conductor layer. The first gate conductor layer is over the gate dielectric layer. The first gate conductor layer includes oxygen. The second gate conductor layer is over the first gate conductor layer.

公开(公告)号：US12068393B2

公开(公告)日：2024-08-20

申请号：US17663979

申请日：2022-05-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Peng-Soon Lim ,  Cheng-Lung Hung ,  Mao-Lin Huang ,  Weng Chang

IPC: H01L29/66 ,  H01L21/28 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L29/06 ,  H01L29/51

CPC classification number: H01L29/66545 ,  H01L21/28026 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/66583 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/0673 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66439 ,  H01L29/665

Abstract: A method includes forming a dummy gate stack, forming a dielectric layer, with the dummy gate stack located in the dielectric layer, removing the dummy gate stack to form a opening in the dielectric layer, forming a metal layer extending into the opening, and etching back the metal layer. The remaining portions of the metal layer in the opening have edges lower than a top surface of the dielectric layer. A conductive layer is selectively deposited in the opening. The conductive layer is over the metal layer, and the metal layer and the conductive layer in combination form a replacement gate.

公开(公告)号：US20220359698A1

公开(公告)日：2022-11-10

申请号：US17870554

申请日：2022-07-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Liang CHENG ,  Peng-Soon Lim ,  Ziwei Fang ,  Huang-Lin Chao

IPC: H01L29/423 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/06 ,  H01L29/49 ,  H01L21/28

Abstract: The present disclosure describes a semiconductor device that includes a substrate and a first transistor on the substrate. The first transistor includes a first gate structure and the first gate structure includes a gate dielectric layer and a first work function layer on the gate dielectric layer. The first gate structure also includes a capping layer on the first work function layer. The semiconductor device also includes a second transistor on the substrate, in which the second transistor includes a second gate structure. The second gate structure includes the gate dielectric layer and a second work function layer on the gate dielectric layer. The second gate structure also includes the first work function layer on the second work function layer and the silicon capping layer on the first work function layer.