公开(公告)号：US20210265220A1

公开(公告)日：2021-08-26

申请号：US17006161

申请日：2020-08-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Wei LEE ,  Pang-Yen TSAI ,  Tsungyu HUNG ,  Huang-Lin CHAO

IPC: H01L21/8234 ,  H01L21/02 ,  H01L21/762 ,  H01L29/66 ,  H01L29/78

Abstract: A method of fabricating a semiconductor device with superlattice structures on a substrate with an embedded isolation structure is disclosed. The method includes forming an etch stop layer on a substrate, forming a superlattice structure on the etch stop layer, depositing an isolation layer on the superlattice structure, depositing a semiconductor layer on the isolation layer, forming a bi-layer isolation structure on the semiconductor layer, removing the substrate and the etch stop layer, etching the superlattice structure, the isolation layer, the semiconductor layer, and the bi-layer isolation structure to form a fin structure, and forming a gate-all-around structure on the fin structure.

公开(公告)号：US20220367525A1

公开(公告)日：2022-11-17

申请号：US17875034

申请日：2022-07-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Tsung-Yu HUNG ,  Pei-Wei LEE ,  Pang-Yen TSAI

IPC: H01L27/12 ,  H01L27/092 ,  H01L29/06 ,  H01L29/161 ,  H01L21/8238 ,  H01L21/84 ,  H01L21/02 ,  H01L29/10

Abstract: A semiconductor device includes a substrate, a first semiconductor fin and a gate stack. The first semiconductor fin is over the substrate and includes a first germanium-containing layer and a second germanium-containing layer over the first germanium-containing layer. The first germanium-containing layer has a germanium atomic percentage higher than a germanium atomic percentage of the second germanium-containing layer. The gate stack is across the first semiconductor fin.

公开(公告)号：US20210234000A1

公开(公告)日：2021-07-29

申请号：US16937365

申请日：2020-07-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Miao-Syuan FAN ,  Pei-Wei LEE ,  Ching-Hua LEE ,  Jung-Wei LEE

IPC: H01L29/08 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L29/417 ,  H01L29/40 ,  H01L29/423 ,  H01L29/10 ,  H01L21/8234

Abstract: The present disclosure relates to a semiconductor device includes first and second source/drain (S/D) regions doped with lead (Pb) at a first dopant concentration. The semiconductor device also includes a channel region between the first and second S/D regions, where the channel region is doped with Pb at a second dopant concentration that is lower than the first dopant concentration. The semiconductor device further includes first and second S/D contacts in contact with the first and second S/D regions, respectively. The semiconductor device also includes a gate electrode over the channel region.

公开(公告)号：US20210082707A1

公开(公告)日：2021-03-18

申请号：US16573596

申请日：2019-09-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Miao-Syuan FAN ,  Ching-Hua LEE ,  Ming-Te CHEN ,  Jung-Wei LEE ,  Pei-Wei LEE

IPC: H01L21/285 ,  H01L21/02 ,  H01L29/66

Abstract: A semiconductor device includes a gate structure disposed over a channel region, a source/drain epitaxial layer disposed at a source/drain region, a nitrogen containing layer disposed on the source/drain epitaxial layer, a silicide layer disposed on the nitrogen containing layer, and a conductive contact disposed on the silicide layer.

公开(公告)号：US20240234506A1

公开(公告)日：2024-07-11

申请号：US18612701

申请日：2024-03-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Miao-Syuan FAN ,  Pei-Wei LEE ,  Ching-Hua LEE ,  Jung-Wei LEE

IPC: H01L29/08 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/0847 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/1037 ,  H01L29/401 ,  H01L29/41791 ,  H01L29/42356 ,  H01L29/66795 ,  H01L29/785

Abstract: The present disclosure relates to a semiconductor device includes first and second source/drain (S/D) regions doped with lead (Pb) at a first dopant concentration. The semiconductor device also includes a channel region between the first and second S/D regions, where the channel region is doped with Pb at a second dopant concentration that is lower than the first dopant concentration. The semiconductor device further includes first and second S/D contacts in contact with the first and second S/D regions, respectively. The semiconductor device also includes a gate electrode over the channel region.

公开(公告)号：US20210098499A1

公开(公告)日：2021-04-01

申请号：US17119539

申请日：2020-12-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Tsung-Yu HUNG ,  Pei-Wei LEE ,  Pang-Yen TSAI

IPC: H01L27/12 ,  H01L21/02 ,  H01L21/8238 ,  H01L29/161 ,  H01L27/092 ,  H01L29/06 ,  H01L29/10 ,  H01L21/84

Abstract: A semiconductor device includes a substrate, a first semiconductor fin and a gate stack. The first semiconductor fin is over the substrate and includes a first germanium-containing layer and a second germanium-containing layer over the first germanium-containing layer. The first germanium-containing layer has a germanium atomic percentage higher than a germanium atomic percentage of the second germanium-containing layer. The gate stack is across the first semiconductor fin.

公开(公告)号：US20220165847A1

公开(公告)日：2022-05-26

申请号：US17650867

申请日：2022-02-14

Applicant: Taiwan Semiconductor Manufacturing Co.,Ltd.

Inventor： Miao-Syuan FAN ,  Pei-Wei LEE ,  Ching-Hua LEE ,  Jung-Wei LEE

IPC: H01L29/08 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L29/417 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/10 ,  H01L29/40

Abstract: The present disclosure relates to a semiconductor device includes first and second source/drain (S/D) regions doped with lead (Pb) at a first dopant concentration. The semiconductor device also includes a channel region between the first and second S/D regions, where the channel region is doped with Pb at a second dopant concentration that is lower than the first dopant concentration. The semiconductor device further includes first and second S/D contacts in contact with the first and second S/D regions, respectively. The semiconductor device also includes a gate electrode over the channel region.