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公开(公告)号：US11716910B2
公开(公告)日：2023-08-01
申请号：US17002098
申请日：2020-08-25
发明人： Chih-Fan Huang , Hsiang-Ku Shen , Liang-Wei Wang , Chen-Chiu Huang , Dian-Hau Chen , Yen-Ming Chen
摘要： Semiconductor device and methods of forming the same are provided. A semiconductor device according to one embodiment includes a dielectric layer including a top surface, a plurality of magneto-resistive memory cells disposed in the dielectric layer and including top electrodes, a first etch stop layer disposed over the dielectric layer, a common electrode extending through the first etch stop layer to be in direct contact with the top electrodes, and a second etch slop layer disposed on the first etch stop layer and the common electrode. Top surfaces of the top electrodes are coplanar with the top surface of the dielectric layer.
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公开(公告)号：US20220069199A1
公开(公告)日：2022-03-03
申请号：US17002098
申请日：2020-08-25
发明人： Chih-Fan Huang , Hsiang-Ku Shen , Liang-Wei Wang , Chen-Chiu Huang , Dian-Hau Chen , Yen-Ming Chen
摘要： Semiconductor device and methods of forming the same are provided. A semiconductor device according to one embodiment includes a dielectric layer including a top surface, a plurality of magneto-resistive memory cells disposed in the dielectric layer and including top electrodes, a first etch stop layer disposed over the dielectric layer, a common electrode extending through the first etch stop layer to be in direct contact with the top electrodes, and a second etch stop layer disposed on the first etch stop layer and the common electrode. Top surfaces of the top electrodes are coplanar with the top surface of the dielectric layer
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公开(公告)号：US11937515B2
公开(公告)日：2024-03-19
申请号：US17884221
申请日：2022-08-09
发明人： Chih-Fan Huang , Hsiang-Ku Shen , Liang-Wei Wang , Chen-Chiu Huang , Dian-Hau Chen , Yen-Ming Chen
摘要： Semiconductor device and methods of forming the same are provided. A semiconductor device according to one embodiment includes a dielectric layer including a top surface, a plurality of magneto-resistive memory cells disposed in the dielectric layer and including top electrodes, a first etch stop layer disposed over the dielectric layer, a common electrode extending through the first etch stop layer to be in direct contact with the top electrodes, and a second etch stop layer disposed on the first etch stop layer and the common electrode. Top surfaces of the top electrodes are coplanar with the top surface of the dielectric layer.
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公开(公告)号：US20220384712A1
公开(公告)日：2022-12-01
申请号：US17884221
申请日：2022-08-09
发明人： Chih-Fan Huang , Hsiang-Ku Shen , Liang-Wei Wang , Chen-Chiu Huang , Dian-Hau Chen , Yen-Ming Chen
摘要： Semiconductor device and methods of forming the same are provided. A semiconductor device according to one embodiment includes a dielectric layer including a top surface, a plurality of magneto-resistive memory cells disposed in the dielectric layer and including top electrodes, a first etch stop layer disposed over the dielectric layer, a common electrode extending through the first etch stop layer to be in direct contact with the top electrodes, and a second etch stop layer disposed on the first etch stop layer and the common electrode. Top surfaces of the top electrodes are coplanar with the top surface of the dielectric layer
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公开(公告)号：US20220059759A1
公开(公告)日：2022-02-24
申请号：US16998911
申请日：2020-08-20
发明人： Hsiang-Ku Shen , Liang-Wei Wang , Dian-Hau Chen
摘要： A method for manufacturing a memory device includes forming a via trench in a substrate and forming a via in the via trench. A lower portion of the via includes a first metal and an upper portion of the via includes a second metal that is different from the first metal. The method further includes forming a magnetic tunneling junction over the via and forming a top electrode over the magnetic tunneling junction.
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公开(公告)号：US20230389437A1
公开(公告)日：2023-11-30
申请号：US18361832
申请日：2023-07-29
发明人： Hsiang-Ku Shen , Liang-Wei Wang , Dian-Hau Chen
摘要： A semiconductor device includes a substrate with a metal line embedded in the substrate, a dielectric layer disposed on the substrate, a bottom electrode via extending through the dielectric layer and landing on a top surface of the metal line, a bottom electrode disposed on a top surface of the bottom electrode via, a magnetic tunneling junction stack disposed on a top surface of the bottom electrode, and a top electrode disposed on the magnetic tunneling junction stack. A lower portion of the bottom electrode via includes a first metal, and an upper portion of the bottom electrode via includes a second metal that is different from the first metal.
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公开(公告)号：US11778918B2
公开(公告)日：2023-10-03
申请号：US16998911
申请日：2020-08-20
发明人： Hsiang-Ku Shen , Liang-Wei Wang , Dian-Hau Chen
摘要： A method for manufacturing a memory device includes forming a via trench in a substrate and forming a via in the via trench. A lower portion of the via includes a first metal and an upper portion of the via includes a second metal that is different from the first metal. The method further includes forming a magnetic tunneling junction over the via and forming a top electrode over the magnetic tunneling junction.
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