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    Physical vapor deposition process for semiconductor interconnection structures
    5.
    发明授权
    Physical vapor deposition process for semiconductor interconnection structures 有权

    公开(公告)号：US10438846B2

    公开(公告)日：2019-10-08

    申请号：US15880324

    申请日：2018-01-25

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Nai-Hao Yang ,  Hung-Wen Su ,  Kuan-Chia Chen

    IPC: H01L21/768 ,  H01L21/28 ,  H01L21/324 ,  H01L21/67 ,  H01L23/532 ,  H01L21/285

    Abstract: The present disclosure provides methods for forming a conductive fill material (e.g., a conductive feature) by a physical vapor deposition (PVD) process. In one embodiment, a method of forming a conductive fill material on a substrate includes maintaining a first substrate temperature at a first range for a first period of time while forming a pre-layer of a conductive fill material on a substrate, providing a thermal energy to the substrate to maintain the substrate at a second substrate temperature at a second range for a second period of time, wherein the second substrate temperature is higher than the first substrate temperature, and continuously providing the thermal energy to the substrate to maintain the substrate a third substrate temperature at a third range for a third period of time to form a bulk layer of the conductive fill material on the substrate.

    Method for forming semiconductor device structure
    7.
    发明授权
    Method for forming semiconductor device structure 有权
    半导体器件结构形成方法

    公开(公告)号：US09275894B2

    公开(公告)日：2016-03-01

    申请号：US14161247

    申请日：2014-01-22

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chi-Feng Lin ,  Kuan-Chia Chen ,  Ching-Hua Hsieh

    IPC: H01L21/44 ,  H01L21/768

    CPC classification number: H01L21/76802 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76882

    Abstract: In accordance with some embodiments, a method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer on a semiconductor substrate. The dielectric layer has at least one first trench in the dielectric layer. The method also includes forming a seed layer on a sidewall and a bottom surface of the first trench. The method further includes forming a first conductive layer on the seed layer. The method includes performing a thermal treatment process to melt and transform the seed layer and the first conductive layer into a second conductive layer. The method also includes forming a third conductive layer on the second conductive layer to fill the first trench.

    Abstract translation: 根据一些实施例，提供了一种用于形成半导体器件结构的方法。 该方法包括在半导体衬底上形成电介质层。 电介质层在电介质层中具有至少一个第一沟槽。 该方法还包括在第一沟槽的侧壁和底表面上形成种子层。 该方法还包括在种子层上形成第一导电层。 该方法包括执行热处理工艺以将种子层和第一导电层熔化并变换为第二导电层。 该方法还包括在第二导电层上形成第三导电层以填充第一沟槽。

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