公开(公告)号：US20220254739A1

公开(公告)日：2022-08-11

申请号：US17481003

申请日：2021-09-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Feng KU ,  Yao-Chun CHUANG ,  Ching-Pin LIN ,  Cheng-Chien LI

IPC: H01L23/58 ,  H01L23/48 ,  H01L23/00 ,  H01L21/768

Abstract: A semiconductor article which includes a semiconductor substrate, a back end of the line (BEOL) wiring portion on the semiconductor substrate, a through silicon via and a guard ring. The semiconductor substrate is made of a semiconductor material. The BEOL wiring portion includes a plurality of wiring layers having electrically conductive wiring and electrical insulating material. The through silicon via provides a conductive path through the BEOL wiring portion and the semiconductor substrate. The guard ring surrounds the through silicon via in the BEOL wiring portion and in some embodiments in the semiconductor substrate.

公开(公告)号：US20170077305A1

公开(公告)日：2017-03-16

申请号：US15154982

申请日：2016-05-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Ming CHANG ,  Chi-Wen LIU ,  Hsin-Chieh HUANG ,  Cheng-Chien LI

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/66 ,  H01L29/06 ,  H01L29/49

CPC classification number: H01L29/7848 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate, at least one semiconductor fin, and at least one epitaxy structure. The semiconductor fin is present on the substrate. The semiconductor fin has at least one recess thereon. The epitaxy structure is present in the recess of the semiconductor fin. A topmost location of the epitaxy structure has an n-type impurity concentration lower than an n-type impurity concentration of a location of the epitaxy structure below the topmost location.

Abstract translation: 半导体器件包括衬底，至少一个半导体鳍片和至少一个外延结构。 半导体鳍片存在于基板上。 半导体鳍片具有至少一个凹部。 外延结构存在于半导体鳍片的凹部中。 外延结构的最顶部位置的n型杂质浓度低于外延结构位于最上位置的位置的n型杂质浓度。

公开(公告)号：US20170077244A1

公开(公告)日：2017-03-16

申请号：US15164824

申请日：2016-05-25

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Ming CHANG ,  Chi-Wen LIU ,  Cheng-Chien LI ,  Hsin-Chieh HUANG

IPC: H01L29/36 ,  H01L21/02 ,  H01L29/78 ,  H01L21/265 ,  H01L29/167 ,  H01L29/06

CPC classification number: H01L29/36 ,  H01L21/02532 ,  H01L21/26506 ,  H01L29/0657 ,  H01L29/167 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device includes a substrate, at least one semiconductor fin, and at least one epitaxy structure. The semiconductor fin is present on the substrate. The semiconductor fin has at least one recess thereon. The epitaxy structure is present in the recess of the semiconductor fin. The epitaxy structure includes a topmost portion, a first portion and a second portion arranged along a direction from the semiconductor fin to the substrate. The first portion has a germanium atomic percentage higher than a germanium atomic percentage of the topmost portion and a germanium atomic percentage of the second portion.

Abstract translation: 半导体器件包括衬底，至少一个半导体鳍片和至少一个外延结构。 半导体鳍片存在于基板上。 半导体鳍片具有至少一个凹部。 外延结构存在于半导体鳍片的凹部中。 外延结构包括沿着从半导体鳍片到衬底的方向布置的最上部分，第一部分和第二部分。 第一部分的锗原子百分比高于最高部分的锗原子百分比和第二部分的锗原子百分比。

公开(公告)号：US20240332218A1

公开(公告)日：2024-10-03

申请号：US18741643

申请日：2024-06-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Feng KU ,  Yao-Chun CHUANG ,  Ching-Pin LIN ,  Cheng-Chien LI

IPC: H01L23/58 ,  H01L21/768 ,  H01L23/00 ,  H01L23/48

CPC classification number: H01L23/585 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/564

Abstract: A semiconductor article which includes a semiconductor substrate, a back end of the line (BEOL) wiring portion on the semiconductor substrate, a through silicon via and a guard ring. The semiconductor substrate is made of a semiconductor material. The BEOL wiring portion includes a plurality of wiring layers having electrically conductive wiring and electrical insulating material. The through silicon via provides a conductive path through the BEOL wiring portion and the semiconductor substrate. The guard ring surrounds the through silicon via in the BEOL wiring portion and in some embodiments in the semiconductor substrate.

公开(公告)号：US20240332219A1

公开(公告)日：2024-10-03

申请号：US18741654

申请日：2024-06-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Feng KU ,  Yao-Chun CHUANG ,  Ching-Pin LIN ,  Cheng-Chien LI

IPC: H01L23/58 ,  H01L21/768 ,  H01L23/00 ,  H01L23/48

CPC classification number: H01L23/585 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/564

Abstract: A semiconductor article which includes a semiconductor substrate, a back end of the line (BEOL) wiring portion on the semiconductor substrate, a through silicon via and a guard ring. The semiconductor substrate is made of a semiconductor material. The BEOL wiring portion includes a plurality of wiring layers having electrically conductive wiring and electrical insulating material. The through silicon via provides a conductive path through the BEOL wiring portion and the semiconductor substrate. The guard ring surrounds the through silicon via in the BEOL wiring portion and in some embodiments in the semiconductor substrate.