公开(公告)号：US20220254739A1

公开(公告)日：2022-08-11

申请号：US17481003

申请日：2021-09-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Feng KU ,  Yao-Chun CHUANG ,  Ching-Pin LIN ,  Cheng-Chien LI

IPC: H01L23/58 ,  H01L23/48 ,  H01L23/00 ,  H01L21/768

Abstract: A semiconductor article which includes a semiconductor substrate, a back end of the line (BEOL) wiring portion on the semiconductor substrate, a through silicon via and a guard ring. The semiconductor substrate is made of a semiconductor material. The BEOL wiring portion includes a plurality of wiring layers having electrically conductive wiring and electrical insulating material. The through silicon via provides a conductive path through the BEOL wiring portion and the semiconductor substrate. The guard ring surrounds the through silicon via in the BEOL wiring portion and in some embodiments in the semiconductor substrate.

公开(公告)号：US20210210616A1

公开(公告)日：2021-07-08

申请号：US17157180

申请日：2021-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： I-Chih CHEN ,  Ru-Shang HSIAO ,  Ching-Pin LIN ,  Chih-Mu HUANG ,  Fu-Tsun TSAI

IPC: H01L29/66 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/423

Abstract: A semiconductor device includes: first and second fin structures, disposed on a substrate, that respectively extend in parallel to an axis; a first gate feature that traverses the first fin structure to overlay a central portion of the first fin structure; a second gate feature that traverses the second fin structure to overlay a central portion of the second fin structure; a first spacer comprising: a first portion comprising two layers that respectively extend from sidewalls of the first gate feature toward opposite directions of the axis; and a second portion comprising two layers that respectively extend from sidewalls of the first portion of the first spacer toward the opposite directions of the axis; and a second spacer comprising two layers that respectively extend from sidewalls of the second gate feature toward the opposite directions of the axis.

公开(公告)号：US20240332219A1

公开(公告)日：2024-10-03

申请号：US18741654

申请日：2024-06-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Feng KU ,  Yao-Chun CHUANG ,  Ching-Pin LIN ,  Cheng-Chien LI

IPC: H01L23/58 ,  H01L21/768 ,  H01L23/00 ,  H01L23/48

CPC classification number: H01L23/585 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/564

Abstract: A semiconductor article which includes a semiconductor substrate, a back end of the line (BEOL) wiring portion on the semiconductor substrate, a through silicon via and a guard ring. The semiconductor substrate is made of a semiconductor material. The BEOL wiring portion includes a plurality of wiring layers having electrically conductive wiring and electrical insulating material. The through silicon via provides a conductive path through the BEOL wiring portion and the semiconductor substrate. The guard ring surrounds the through silicon via in the BEOL wiring portion and in some embodiments in the semiconductor substrate.

公开(公告)号：US20250072082A1

公开(公告)日：2025-02-27

申请号：US18938087

申请日：2024-11-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： I-Chih CHEN ,  Ru-Shang HSIAO ,  Ching-Pin LIN ,  Chih-Mu HUANG ,  Fu-Tsun TSAI

IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/423

Abstract: A semiconductor device includes: first and second fin structures, disposed on a substrate, that respectively extend in parallel to an axis; a first gate feature that traverses the first fin structure to overlay a central portion of the first fin structure; a second gate feature that traverses the second fin structure to overlay a central portion of the second fin structure; a first spacer comprising: a first portion comprising two layers that respectively extend from sidewalls of the first gate feature toward opposite directions of the axis; and a second portion comprising two layers that respectively extend from sidewalls of the first portion of the first spacer toward the opposite directions of the axis; and a second spacer comprising two layers that respectively extend from sidewalls of the second gate feature toward the opposite directions of the axis.

公开(公告)号：US20240332218A1

公开(公告)日：2024-10-03

申请号：US18741643

申请日：2024-06-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Feng KU ,  Yao-Chun CHUANG ,  Ching-Pin LIN ,  Cheng-Chien LI

IPC: H01L23/58 ,  H01L21/768 ,  H01L23/00 ,  H01L23/48

CPC classification number: H01L23/585 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/564

Abstract: A semiconductor article which includes a semiconductor substrate, a back end of the line (BEOL) wiring portion on the semiconductor substrate, a through silicon via and a guard ring. The semiconductor substrate is made of a semiconductor material. The BEOL wiring portion includes a plurality of wiring layers having electrically conductive wiring and electrical insulating material. The through silicon via provides a conductive path through the BEOL wiring portion and the semiconductor substrate. The guard ring surrounds the through silicon via in the BEOL wiring portion and in some embodiments in the semiconductor substrate.