公开(公告)号：US20240305323A1

公开(公告)日：2024-09-12

申请号：US18437719

申请日：2024-02-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sarma Sundareswara Gunturi ,  Chandrasekhar Sriram ,  Jawaharlal Tangudu ,  Nishant Kumar

IPC: H04B1/04 ,  H03F1/32 ,  H03F3/24

CPC classification number: H04B1/0475 ,  H03F1/3241 ,  H03F3/245 ,  H03F2200/451 ,  H04B2001/0425

Abstract: A circuit includes a first digital pre-distortion (DPD) corrector and a second DPD corrector. The first DPD corrector has an input, and an output. The second DPD corrector has an input coupled to the input of the first DPD corrector, and an output. A signal combiner has a first input coupled to the output of the first DPD corrector, a second input coupled to the output of the second DPD corrector, and an output. The second DPD corrector is configured to provide a signal at the output of the second DPD corrector based on a signal at the input of the second DPD corrector and one or more signal statistics related to the signal at the input of the second DPD corrector.

公开(公告)号：US10715376B2

公开(公告)日：2020-07-14

申请号：US16444035

申请日：2019-06-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jaiganesh Balakrishnan ,  Jawaharlal Tangudu ,  Sthanunathan Ramakrishnan ,  Chandrasekhar Sriram

IPC: H03D1/04 ,  H04L27/38 ,  H04B1/30 ,  H04L27/26 ,  H04L27/36

Abstract: An IQ mismatch correction function generator configured to generate an enhanced IQ mismatch correction function to improve the compensation for IQ mismatch, and an IQ signal receiver with the IQ mismatch correction function generator, wherein the enhanced IQ mismatch correction function is determined based on an initial IQ mismatch correction function derived from IQ mismatch estimates corresponding to frequency bins where signals are present and error of the initial IQ mismatch correction function by comparing the values of the initial IQ mismatch correction function with IQ mismatch estimates corresponding to a respective bin of the frequency bins.

公开(公告)号：US11336380B2

公开(公告)日：2022-05-17

申请号：US16907051

申请日：2020-06-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sarma Sundareswara Gunturi ,  Chandrasekhar Sriram ,  Jawaharlal Tangudu ,  Sashidharan Venkatraman

IPC: H04L25/03 ,  H04B17/11 ,  H04L27/34 ,  H04B17/10 ,  G01S5/02

Abstract: A channel response generating module and method for generating a channel response based on a ratio of a channel response corresponding to an image signal frequency bin in relation to a channel response corresponding to a traffic signal frequency bin, or a channel response corresponding to a first frequency bin in relation to a channel response corresponding to a second frequency bin, and a zero-IF signal transmitter employing the channel response generating module and method to efficiently suppress image signals or compensate traffic signals during transmission of IQ RF signals.

公开(公告)号：US10250273B2

公开(公告)日：2019-04-02

申请号：US15791538

申请日：2017-10-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sthanunathan Ramakrishnan ,  Sashidharan Venkatraman ,  Chandrasekhar Sriram ,  Jawaharlal Tangudu

IPC: H03M1/08 ,  H03M1/10 ,  H03M1/12

Abstract: An integrated circuit chip includes an interleaved analog-to-digital converter (ADC) and an interleaving calibration circuit. The interleaved ADC includes a plurality of ADCs that are each configured to sample an analog signal. The interleaved ADC is configured to convert the analog signal into an interleaved analog-to-digital signal (IADC signal) that includes a plurality of spurious signals formed from mismatches between the plurality of ADCs. The interleaving calibration circuit is configured to receive the IADC signal from the interleaved ADC, generate a mismatch profile estimate corresponding to the plurality of spurious signals to generate one or more mismatch profile estimates, determine whether a first mismatch profile estimate is in a frequency band of interest, and, in response to a determination that the first mismatch profile estimate is in the frequency band of interest, generate a set of model parameters based on the first mismatch profile estimate.

公开(公告)号：US20240364374A1

公开(公告)日：2024-10-31

申请号：US18645599

申请日：2024-04-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sarma Sundareswara Gunturi ,  Nishant Kumar ,  Chandrasekhar Sriram ,  Jawaharlal Tangudu ,  Ram Narayan Krishna Nama Mony ,  Varun Padavu Devaraj . ,  Sashidharan Venkatraman ,  Pankaj Gaur

IPC: H04B1/04

CPC classification number: H04B1/0475 ,  H04B2001/0408

Abstract: A circuit includes a capture subsystem and digital pre-distortion (DPD) circuitry. The capture subsystem is configured to capture a set of signal samples responsive to a capture enable signal. The DPD circuitry is configured to generate a signal statistics signal based on an input signal, generate a set of DPD coefficients based on the set of signal samples, and apply DPD correction to the input signal to produce an output signal based on the signal statistics signal and the set of DPD coefficients. The set of signal samples includes samples of the signal statistics signal.

公开(公告)号：US11757479B2

公开(公告)日：2023-09-12

申请号：US17489381

申请日：2021-09-29

Applicant: Texas Instruments Incorporated

Inventor： Sarma Sundareswara Gunturi ,  Venkateshwara Reddy Pothapu ,  Chandrasekhar Sriram ,  Raju Kharataram Chaudhari ,  Sai Vaibhav Batchu ,  Pankaj Gaur

IPC: H04B1/04 ,  H03G3/30

CPC classification number: H04B1/0475 ,  H03G3/3036 ,  H03G2201/106

Abstract: A TX-TX pre-compensation system that estimates unwanted coupling in a victim transmit chain caused by an aggressor transmit chain and injects a pre-compensation signal to cancel out the estimated coupling. In some embodiments, a signal measurement module estimates the amplitude, phase, and envelope delay of the coupling and an isolation pre-compensation module generates the pre-compensation signal based on the estimated amplitude, the estimated phase, the estimated envelope delay, and the difference between the carrier frequencies of the transmit chains. Since the phase of the coupling may be affected by the carrier frequency of the transmit chains, in some embodiments the phase of the pre-compensation signal is adjusted in response to a change in carrier frequency. Since the amplitude of the coupling may be affected by attenuator gain settings, in some embodiments the amplitude of the pre-compensation signal may be adjusted in response to a change in attenuator gain setting.

公开(公告)号：US10778344B2

公开(公告)日：2020-09-15

申请号：US16661628

申请日：2019-10-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sarma Sundareswara Gunturi ,  Chandrasekhar Sriram ,  Jawaharlal Tangudu ,  Sashidharan Venkatraman

IPC: G01S5/02 ,  H04B17/11 ,  H04L27/34 ,  H04B17/10

Abstract: A channel response generating module and method for generating a channel response based on a ratio of a channel response corresponding to an image signal frequency bin in relation to a channel response corresponding to a traffic signal frequency bin, or a channel response corresponding to a first frequency bin in relation to a channel response corresponding to a second frequency bin, and a zero-IF signal transmitter employing the channel response generating module and method to efficiently suppress image signals or compensate traffic signals during transmission of IQ RF signals.

公开(公告)号：US11239854B2

公开(公告)日：2022-02-01

申请号：US17061730

申请日：2020-10-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jawaharlal Tangudu ,  Pankaj Gupta ,  Sreenath Narayanan Potty ,  Ajai Paulose ,  Chandrasekhar Sriram ,  Mahesh Ravi Varma ,  Shabbar Abbasi Vejlani ,  Neeraj Shrivastava ,  Himanshu Varshney ,  Divyeshkumar Mahendrabhai Patel ,  Raju Kharataram Chaudhari

IPC: H03M1/36 ,  H03M1/12

Abstract: A non-linearity correction circuit includes a non-linearity coefficient estimation circuit. The non-linearity coefficient estimation circuit includes a data capture circuit, a non-linearity term generation circuit, a time-to-frequency conversion circuit, a bin identification circuit, a residual non-linearity conversion circuit, and a non-linearity coefficient generation circuit. The non-linearity term generation circuit is coupled to the data capture circuit. The time-to-frequency conversion circuit is coupled to the data capture circuit and the non-linearity term generation circuit. The bin identification circuit is coupled to the time-to-frequency conversion circuit. The residual non-linearity conversion circuit is coupled to the bin identification circuit. The non-linearity coefficient generation circuit is coupled to the bin identification circuit and the residual non-linearity conversion circuit.

公开(公告)号：US11063623B2

公开(公告)日：2021-07-13

申请号：US16692006

申请日：2019-11-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sarma Sundareswara Gunturi ,  Chandrasekhar Sriram ,  Jawaharlal Tangudu ,  Eeshan Miglani ,  Jagannathan Venkataraman

IPC: H04B1/30 ,  H04B1/10

Abstract: A non-linearity correction module, an optional droop corrector, and a zero-IF receiver with the non-linearity correction module and an optional droop corrector, wherein the non-linearity correction module is configured to generate a non-linearity term scaled to mitigate an inter-modulation component term of a RF signal received by the zero-IF receiver based on a test signal to enhance linearity in the zero-IF receiver and the optional droop corrector is configured to compensate a droop within a signal band of interest, caused by an analog low pass filter filtering a RF signal received by the zero-IF receiver, before a down-converted RF signal is fed into the non-linearity module.

公开(公告)号：US10581406B2

公开(公告)日：2020-03-03

申请号：US16005673

申请日：2018-06-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jawaharlal Tangudu ,  Karthik Khanna S ,  Chandrasekhar Sriram ,  Rajendrakumar Joish ,  Viswanathan Nagarajan

IPC: H03H11/12 ,  H01P1/22 ,  H03H11/06 ,  H03H11/04 ,  H03M1/12

Abstract: A circuit for digital filtering an analog signal converted to digital, including an analog circuit to generate an analog signal, the analog signal including phase and/or gain errors. An analog-to-digital converter (ADC) to convert the analog signal to a digital signal output to a digital signal path. A frequency-dependent corrector filter included in the digital signal path, and configured as a parameterized filter, the parameterized filter configurable based on the DSA control signal with at least one complex filter parameter for each DSA attenuation step, to correct frequency-dependent errors in phase and/or gain.