Organic light emitting diode display and manufacturing method thereof
    2.
    发明申请
    Organic light emitting diode display and manufacturing method thereof 失效
    有机发光二极管显示及其制造方法

    公开(公告)号:US20120074420A1

    公开(公告)日:2012-03-29

    申请号:US13064864

    申请日:2011-04-21

    IPC分类号: H01L33/08 H01L33/16

    摘要: An organic light emitting diode (OLED) display includes: a substrate; a semiconductor layer on the substrate; a gate insulating layer covering the semiconductor layer; a gate electrode formed in the gate insulating layer and overlapping the semiconductor layer; a pixel electrode formed in a pixel area over the gate insulating layer; an interlayer insulating layer covering the gate electrode and the gate insulating layer, and exposing the pixel electrode through a pixel opening; a source electrode and a drain electrode formed in the interlayer insulating layer and connected to the semiconductor layer; and a barrier rib covering the interlayer insulating layer, the source electrode, and the drain electrode, and the drain electrode contacts a side wall of the pixel opening and is connected to the pixel electrode. Such an OLED display may have an improved aperture ratio.

    摘要翻译: 有机发光二极管(OLED)显示器包括:基板; 衬底上的半导体层; 覆盖半导体层的栅极绝缘层; 形成在所述栅极绝缘层中且与所述半导体层重叠的栅电极; 形成在所述栅绝缘层上的像素区域中的像素电极; 覆盖所述栅电极和所述栅极绝缘层的层间绝缘层,并且使所述像素电极通过像素开口曝光; 源电极和漏电极,形成在层间绝缘层中并连接到半导体层; 并且覆盖层间绝缘层,源电极和漏电极的阻挡肋,漏电极接触像素开口的侧壁并连接到像素电极。 这样的OLED显示器可以具有改善的开口率。

    Thin film transistor substrate and method of manufacturing the same
    3.
    发明授权
    Thin film transistor substrate and method of manufacturing the same 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号:US07682881B2

    公开(公告)日:2010-03-23

    申请号:US11502806

    申请日:2006-08-11

    摘要: A thin film transistor substrate with good process efficiency and a method of manufacturing the same are provided. The thin film transistor substrate includes a first conductive type MOS transistor and a second conductive type MOS transistor. The first conductive type MOS transistor includes a first semiconductor layer formed on a blocking layer and having first conductive type low-concentration doping regions adjacent to both sides of a channel region, first conductive type source/drain regions adjacent to the first conductive type low-concentration doping regions, a first gate insulating layer formed on the first semiconductor layer, a second gate insulating layer formed on the first gate insulating layer and overlapping with the channel region and the low-concentration doping regions of the first semiconductor layer, and a first gate electrode formed on the second gate insulating layer. The second conductive type MOS transistor includes a second semiconductor layer formed on the blocking layer and having second conductive type source/drain regions adjacent to both sides of a channel region, the first gate insulating layer formed on the second semiconductor layer, a third gate insulating layer formed on the first gate insulating layer and overlapping with the second semiconductor layer, and a second gate electrode formed on the third gate insulating layer.

    摘要翻译: 提供了具有良好的工艺效率的薄膜晶体管基板及其制造方法。 薄膜晶体管基板包括第一导电型MOS晶体管和第二导电型MOS晶体管。 第一导电型MOS晶体管包括形成在阻挡层上并且具有与沟道区两侧相邻的第一导电型低浓度掺杂区的第一半导体层,与第一导电型低电位相邻的第一导电型源/漏区, 浓度掺杂区域,形成在第一半导体层上的第一栅极绝缘层,形成在第一栅极绝缘层上并与沟道区域和第一半导体层的低浓度掺杂区域重叠的第二栅极绝缘层,以及第一栅极绝缘层 栅极形成在第二栅极绝缘层上。 第二导电型MOS晶体管包括形成在阻挡层上并具有与沟道区两侧相邻的第二导电型源极/漏极区的第二半导体层,形成在第二半导体层上的第一栅极绝缘层,第三栅极绝缘层 形成在第一栅极绝缘层上并与第二半导体层重叠的第二栅极电极,以及形成在第三栅极绝缘层上的第二栅电极。

    Thin film transistor plate and method of fabricating the same
    4.
    发明申请
    Thin film transistor plate and method of fabricating the same 有权
    薄膜晶体管板及其制造方法

    公开(公告)号:US20070007524A1

    公开(公告)日:2007-01-11

    申请号:US11480223

    申请日:2006-06-30

    IPC分类号: H01L29/04 H01L21/84

    CPC分类号: H01L27/1255

    摘要: A thin film transistor (TFT) plate having improved processing efficiency without degradation in performance and a method of fabricating the TFT plate are provided. The TFT plate includes gate insulating layer patterns made of dual layers. Upper portions of both sidewalls of an upper gate insulating layer pattern are substantially aligned with both sidewalls of a gate electrode. Lower portions of both sidewalls of the upper gate insulating layer pattern are substantially aligned with a boundary portion between a lightly doped region and a source region and a boundary portion between the lightly doped region and a drain region. Thus, the concentration of the lightly doped region under a lower gate insulating layer pattern gradually changes.

    摘要翻译: 提供了一种提高处理效率而不降低性能的薄膜晶体管(TFT)板,以及制造该TFT板的方法。 TFT板包括由双层制成的栅极绝缘层图案。 上栅极绝缘层图案的两个侧壁的上部基本上与栅电极的两个侧壁对准。 上部栅极绝缘层图案的两个侧壁的下部基本上与轻掺杂区域和源极区域之间的边界部分以及轻掺杂区域和漏极区域之间的边界部分对准。 因此,较低栅极绝缘层图案下的轻掺杂区域的浓度逐渐变化。

    Thin Film Transistor Substrate And Method Of Manufacturing The Same
    5.
    发明申请
    Thin Film Transistor Substrate And Method Of Manufacturing The Same 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号:US20100127329A1

    公开(公告)日:2010-05-27

    申请号:US12693909

    申请日:2010-01-26

    IPC分类号: H01L27/12

    摘要: A thin film transistor substrate with good process efficiency and a method of manufacturing the same are provided. The thin film transistor substrate includes a first conductive type MOS transistor and a second conductive type MOS transistor. The first conductive type MOS transistor includes a first semiconductor layer formed on a blocking layer and having first conductive type low-concentration doping regions adjacent to both sides of a channel region, first conductive type source/drain regions adjacent to the first conductive type low-concentration doping regions, a first gate insulating layer formed on the first semiconductor layer, a second gate insulating layer formed on the first gate insulating layer and overlapping with the channel region and the low-concentration doping regions of the first semiconductor layer, and a first gate electrode formed on the second gate insulating layer. The second conductive type MOS transistor includes a second semiconductor layer formed on the blocking layer and having second conductive type source/drain regions adjacent to both sides of a channel region, the first gate insulating layer formed on the second semiconductor layer, a third gate insulating layer formed on the first gate insulating layer and overlapping with the second semiconductor layer, and a second gate electrode formed on the third gate insulating layer.

    摘要翻译: 提供了具有良好的工艺效率的薄膜晶体管基板及其制造方法。 薄膜晶体管基板包括第一导电型MOS晶体管和第二导电型MOS晶体管。 第一导电型MOS晶体管包括形成在阻挡层上并且具有与沟道区两侧相邻的第一导电型低浓度掺杂区的第一半导体层,与第一导电型低电位相邻的第一导电型源/漏区, 浓度掺杂区域,形成在第一半导体层上的第一栅极绝缘层,形成在第一栅极绝缘层上并与沟道区域和第一半导体层的低浓度掺杂区域重叠的第二栅极绝缘层,以及第一栅极绝缘层, 栅极形成在第二栅极绝缘层上。 第二导电型MOS晶体管包括形成在阻挡层上并具有与沟道区两侧相邻的第二导电型源极/漏极区的第二半导体层,形成在第二半导体层上的第一栅极绝缘层,第三栅极绝缘层 形成在第一栅极绝缘层上并与第二半导体层重叠的第二栅极电极,以及形成在第三栅极绝缘层上的第二栅电极。

    METHOD OF MANUFACTURING A THIN-FILM TRANSISTOR
    6.
    发明申请
    METHOD OF MANUFACTURING A THIN-FILM TRANSISTOR 审中-公开
    制造薄膜晶体管的方法

    公开(公告)号:US20090075436A1

    公开(公告)日:2009-03-19

    申请号:US12194660

    申请日:2008-08-20

    IPC分类号: H01L29/04 H01L29/786

    CPC分类号: H01L29/66757 H01L27/1285

    摘要: A method of manufacturing a thin-film transistor (TFT) includes forming an amorphous silicon layer on a substrate, crystallizing the amorphous silicon layer into a polycrystalline silicon layer using a laser beam, and selectively etching a protrusion formed at a grain boundary in the polycrystalline silicon layer using a hydroxide etchant.

    摘要翻译: 制造薄膜晶体管(TFT)的方法包括在基板上形成非晶硅层,使用激光束将非晶硅层结晶成多晶硅层,并且选择性地蚀刻形成在多晶硅中的晶界处的突起 硅层使用氢氧化物腐蚀剂。

    Semi-transmission LCD device and method of making the same
    7.
    发明申请
    Semi-transmission LCD device and method of making the same 审中-公开
    半透明液晶装置及其制作方法

    公开(公告)号:US20060050211A1

    公开(公告)日:2006-03-09

    申请号:US11208917

    申请日:2005-08-22

    IPC分类号: G02F1/1335 G02F1/136

    摘要: A liquid crystal display device includes a first substrate and a second substrate opposing the first substrate. The first substrate has a reflecting area and a transmitting area. The first substrate includes a first insulating substrate, a polysilicon layer disposed at the first insulating substrate and having a channel area, a gate wiring comprising a gate electrode positioned on the channel area, a source area and a drain area wherein the source area and the drain area are separated each other by the channel area, a data wiring comprising a source electrode and a drain electrode electrically connected with the source area and the drain area, respectively, an organic layer disposed at the data wiring, a reflecting layer disposed at the organic layer and defining the reflecting area, a color filter layer disposed at the reflecting layer, and a pixel electrode layer disposed at the color filter layer and electrically connected with the drain electrode.

    摘要翻译: 液晶显示装置包括与第一基板相对的第一基板和第二基板。 第一基板具有反射区域和透射区域。 第一衬底包括第一绝缘衬底,设置在第一绝缘衬底处并具有沟道区的多晶硅层,包括位于沟道区上的栅电极的栅极布线,源区和漏区,其中源区和 漏极区域彼此分开通道区域,数据布线包括分别与源区域和漏极区域电连接的源电极和漏极电极,设置在数据布线处的有机层,设置在数据布线处的反射层 有机层并限定反射区域,设置在反射层处的滤色器层和设置在滤色器层处并与漏电极电连接的像素电极层。

    Thin film transistor substrate and method of manufacturing the same
    8.
    发明授权
    Thin film transistor substrate and method of manufacturing the same 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号:US08253202B2

    公开(公告)日:2012-08-28

    申请号:US12693909

    申请日:2010-01-26

    IPC分类号: H01L27/01 H01L27/12

    摘要: A thin film transistor substrate with good process efficiency and a method of manufacturing the same are provided. The thin film transistor substrate includes a first conductive type MOS transistor and a second conductive type MOS transistor. The first conductive type MOS transistor includes a first semiconductor layer formed on a blocking layer and having first conductive type low-concentration doping regions adjacent to both sides of a channel region, first conductive type source/drain regions adjacent to the first conductive type low-concentration doping regions, a first gate insulating layer formed on the first semiconductor layer, a second gate insulating layer formed on the first gate insulating layer and overlapping with the channel region and the low-concentration doping regions of the first semiconductor layer, and a first gate electrode formed on the second gate insulating layer. The second conductive type MOS transistor includes a second semiconductor layer formed on the blocking layer and having second conductive type source/drain regions adjacent to both sides of a channel region, the first gate insulating layer formed on the second semiconductor layer, a third gate insulating layer formed on the first gate insulating layer and overlapping with the second semiconductor layer, and a second gate electrode formed on the third gate insulating layer.

    摘要翻译: 提供了具有良好的工艺效率的薄膜晶体管基板及其制造方法。 薄膜晶体管基板包括第一导电型MOS晶体管和第二导电型MOS晶体管。 第一导电型MOS晶体管包括形成在阻挡层上并且具有与沟道区两侧相邻的第一导电型低浓度掺杂区的第一半导体层,与第一导电型低电位相邻的第一导电型源/漏区, 浓度掺杂区域,形成在第一半导体层上的第一栅极绝缘层,形成在第一栅极绝缘层上并与沟道区域和第一半导体层的低浓度掺杂区域重叠的第二栅极绝缘层,以及第一栅极绝缘层 栅极形成在第二栅极绝缘层上。 第二导电型MOS晶体管包括形成在阻挡层上并具有与沟道区两侧相邻的第二导电型源极/漏极区的第二半导体层,形成在第二半导体层上的第一栅极绝缘层,第三栅极绝缘层 形成在第一栅极绝缘层上并与第二半导体层重叠的第二栅电极,以及形成在第三栅极绝缘层上的第二栅电极。

    Thin film transistor plate and method of fabricating the same
    9.
    发明授权
    Thin film transistor plate and method of fabricating the same 有权
    薄膜晶体管板及其制造方法

    公开(公告)号:US07800177B2

    公开(公告)日:2010-09-21

    申请号:US11480223

    申请日:2006-06-30

    IPC分类号: H01L27/12

    CPC分类号: H01L27/1255

    摘要: A thin film transistor (TFT) plate having improved processing efficiency without degradation in performance and a method of fabricating the TFT plate are provided. The TFT plate includes gate insulating layer patterns made of dual layers. Upper portions of both sidewalls of an upper gate insulating layer pattern are substantially aligned with both sidewalls of a gate electrode. Lower portions of both sidewalls of the upper gate insulating layer pattern are substantially aligned with a boundary portion between a lightly doped region and a source region and a boundary portion between the lightly doped region and a drain region. Thus, the concentration of the lightly doped region under a lower gate insulating layer pattern gradually changes.

    摘要翻译: 提供了一种提高处理效率而不降低性能的薄膜晶体管(TFT)板,以及制造该TFT板的方法。 TFT板包括由双层制成的栅极绝缘层图案。 上栅极绝缘层图案的两个侧壁的上部基本上与栅电极的两个侧壁对准。 上部栅极绝缘层图案的两个侧壁的下部基本上与轻掺杂区域和源极区域之间的边界部分以及轻掺杂区域和漏极区域之间的边界部分对准。 因此,较低栅极绝缘层图案下的轻掺杂区域的浓度逐渐变化。

    Thin film transistor substrate and method of manufacturing the same
    10.
    发明申请
    Thin film transistor substrate and method of manufacturing the same 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号:US20070045627A1

    公开(公告)日:2007-03-01

    申请号:US11502806

    申请日:2006-08-11

    IPC分类号: H01L29/76

    摘要: A thin film transistor substrate with good process efficiency and a method of manufacturing the same are provided. The thin film transistor substrate includes a first conductive type MOS transistor and a second conductive type MOS transistor. The first conductive type MOS transistor includes a first semiconductor layer formed on a blocking layer and having first conductive type low-concentration doping regions adjacent to both sides of a channel region, first conductive type source/drain regions adjacent to the first conductive type low-concentration doping regions, a first gate insulating layer formed on the first semiconductor layer, a second gate insulating layer formed on the first gate insulating layer and overlapping with the channel region and the low-concentration doping regions of the first semiconductor layer, and a first gate electrode formed on the second gate insulating layer. The second conductive type MOS transistor includes a second semiconductor layer formed on the blocking layer and having second conductive type source/drain regions adjacent to both sides of a channel region, the first gate insulating layer formed on the second semiconductor layer, a third gate insulating layer formed on the first gate insulating layer and overlapping with the second semiconductor layer, and a second gate electrode formed on the third gate insulating layer.

    摘要翻译: 提供了具有良好的工艺效率的薄膜晶体管基板及其制造方法。 薄膜晶体管基板包括第一导电型MOS晶体管和第二导电型MOS晶体管。 第一导电型MOS晶体管包括形成在阻挡层上并且具有与沟道区两侧相邻的第一导电型低浓度掺杂区的第一半导体层,与第一导电型低电位相邻的第一导电型源/漏区, 浓度掺杂区域,形成在第一半导体层上的第一栅极绝缘层,形成在第一栅极绝缘层上并与沟道区域和第一半导体层的低浓度掺杂区域重叠的第二栅极绝缘层,以及第一栅极绝缘层 栅极形成在第二栅极绝缘层上。 第二导电型MOS晶体管包括形成在阻挡层上并具有与沟道区两侧相邻的第二导电型源极/漏极区的第二半导体层,形成在第二半导体层上的第一栅极绝缘层,第三栅极绝缘层 形成在第一栅极绝缘层上并与第二半导体层重叠的第二栅极电极,以及形成在第三栅极绝缘层上的第二栅极电极。