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公开(公告)号：US11645741B2
公开(公告)日：2023-05-09
申请号：US17294920
申请日：2019-11-27
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jaehyoung Park , Hyungsok Yeo , Yongjae Lee , Junyoung Lee
CPC classification number: G06T5/50 , G06T7/33 , H04N5/265 , H04N23/71 , H04N23/73 , H04N23/743 , G06T2207/10144 , G06T2207/20221
Abstract: Disclosed is an electronic device which a camera, a memory, and a processor that is operatively connected with the camera and the memory. The processor performs photographing on an external object multiple times depending on a second exposure time shorter than a specified first exposure time by using the camera, obtains a first image set including a plurality of first images depending on the multiple photographing, composes the first image set to generate a second image, identifies a specific area around at least one light source corresponding to a light source included in the second image, and generates a third image where an image effect associated with the light source is added to the specific area, by using the second image. Moreover, various embodiment found through the present disclosure are possible.
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公开(公告)号：US20190158320A1
公开(公告)日：2019-05-23
申请号：US16108894
申请日：2018-08-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hye Jung Kwon , Seungjun Bae , Yongjae Lee , Young-Sik Kim , Young-Ju Kim , Suyeon Doo , Yoon-Joo Eom
Abstract: A memory device includes memory cell array including a plurality of memory cells that store data, a first transmitter that transmits the data to an external device through a first data line, and a ZQ controller that performs a ZQ calibration operation to generate a first ZQ code for impedance matching of the first data line. The first transmitter encodes the first ZQ code and the first data based on a first clock and drives the first data line based on the encoded result based on a second clock.
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公开(公告)号：US10666467B2
公开(公告)日：2020-05-26
申请号：US16108894
申请日：2018-08-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hye Jung Kwon , Seungjun Bae , Yongjae Lee , Young-Sik Kim , Young-Ju Kim , Suyeon Doo , Yoon-Joo Eom
Abstract: A memory device includes memory cell array including a plurality of memory cells that store data, a first transmitter that transmits the data to an external device through a first data line, and a ZQ controller that performs a ZQ calibration operation to generate a first ZQ code for impedance matching of the first data line. The first transmitter encodes the first ZQ code and the first data based on a first clock and drives the first data line based on the encoded result based on a second clock.
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公开(公告)号：US12177552B2
公开(公告)日：2024-12-24
申请号：US18204174
申请日：2023-05-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yongjae Lee
Abstract: Provided is a lens assembly comprising at least two lenses aligned along a first optical axis; an image sensor configured to receive light guided or condensed through the at least two lenses; and at least one optical member disposed between the at least two lenses and the image sensor to receive light incident through the at least two lenses, and refract or reflect the light at least twice, to guide or emit the light to the image sensor, where a ratio of a longer side of an imaging surface of the image sensor to a longer side of an emission surface of a first optical member closest to the image sensor is within a specified range.
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公开(公告)号：US20240316536A1
公开(公告)日：2024-09-26
申请号：US18603743
申请日：2024-03-13
Inventor： Jong-San Chang , Seongyun Ryu , Seungjun Lee , Joungwoo Han , Woosung Choi , Yongjae Lee , Jungje Park , Taewoo Lee , Hyunsik Han
CPC classification number: B01J23/30 , B01D53/8662 , B01J23/06 , B01J37/0201 , B01J37/0236 , B01J37/04 , B01J37/08 , B01D2255/20776 , B01D2255/20792 , B01D2255/2092 , B01D2257/2066 , B01D2258/0216
Abstract: Proposed are a catalyst for decomposing perfluorocompounds (PFCs) and a method of preparing the same. The provided catalyst for decomposing PFCs and the method of preparing the same are as follows. Zinc as an active component for performance improvement and tungsten (W) as an auxiliary component are added to alumina selected from at least one of gamma alumina, aluminum trihydroxide, boehmite, and pseudo-boehmite, and a weight ratio of Al, Zn, and W is at 100:30 to 100:1 to 11. The catalyst for decomposing PFCs not only has an effect of having durability against fluorine generated by decomposition of PFCs but also has a synergistic effect of improving reaction activity. Furthermore, the catalyst decomposes PFCs at a lower temperature than conventional catalysts for decomposing PFCs. Thus, it is possible to reduce operating costs and secure the durability of the system during continuous operation.
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Patent Agency Ranking
公开(公告)号：US11989459B2
公开(公告)日：2024-05-21
申请号：US18073079
申请日：2022-12-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hongjun Jin , Yongjae Lee , Seunghan Kim , Hyoungjoo Kim
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0653 , G06F3/0673 , G11C29/10 , G11C29/56004
Abstract: A semiconductor memory device includes a test pattern data storage configured to store test write pattern data in response to a register write command and a register address and output test read pattern data in response to a test read command and a test pattern data selection signal during a test operation, a memory cell array including a plurality of memory cells and configured to generate read data, a read path unit configured to generate n read data, by serializing the read data, and a test read data generation unit configured to generate n test read data, by comparing the test read pattern data with each of the n read data, generated at a first data rate, and generate the n test read data, at a second data rate lower than the first data rate, during the test operation.
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公开(公告)号：US20230165016A1
公开(公告)日：2023-05-25
申请号：US17934317
申请日：2022-09-22
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yongjae Lee , Kyungsoo Kim , Jinyoung Park , Kyen-Hee Lee
CPC classification number: H01L27/228 , H01L43/04 , H01L43/06
Abstract: A semiconductor memory device is disclosed. The semiconductor memory device may include a magnetic tunnel junction pattern, a spin-orbit torque (SOT) pattern in contact with a first portion of the magnetic tunnel junction pattern, a first transistor electrically connected to a second portion of the magnetic tunnel junction pattern and configured to be controlled by a first word line, and a second transistor electrically connected to a first end of the spin-orbit torque pattern and configured to be controlled by a second word line. An effective channel width of the first transistor may be different from an effective channel width of the second transistor.
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公开(公告)号：US20250072005A1
公开(公告)日：2025-02-27
申请号：US18629542
申请日：2024-04-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kilho LEE , Yongjae Lee
IPC: H10B61/00 , B64D47/00 , H01L25/065 , H10B80/00
Abstract: Provided is a semiconductor device including a logic region including a circuit, a first memory region controlled by the logic region and having a first storage capacity, the first memory region including a plurality of first memory cells, and a second memory region controlled by the logic region and having a second storage capacity greater than the first storage capacity, the second memory region including a plurality of second memory cells, wherein each of the plurality of first memory cells and each of the plurality of second memory cells includes a magnetic memory element, and wherein an operating speed of the first memory region is faster than an operating speed of the second memory region.
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公开(公告)号：US20240152284A1
公开(公告)日：2024-05-09
申请号：US18232618
申请日：2023-08-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yongjae Lee , Dongbin Park , Wonje Heo
CPC classification number: G06F3/0622 , G06F3/0655 , G06F3/0679 , H04L9/30
Abstract: A storage controller configured to control a nonvolatile memory includes a one-time programmable (OTP) memory configured to store a first public key, and a processor configured to, based on a first signature added to a firmware image including a host authentication public key being verified using the first public key, receive a storage command including at least one second public key and a first host authentication signature for the at least one second public key and store the at least one second public key in the OTP memory based on the first host authentication signature being verified using the host authentication public key.
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公开(公告)号：US11520528B2
公开(公告)日：2022-12-06
申请号：US17375168
申请日：2021-07-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hongjun Jin , Yongjae Lee , Seunghan Kim , Hyoungjoo Kim
Abstract: A semiconductor memory device includes a test pattern data storage configured to store test write pattern data in response to a register write command and a register address and output test read pattern data in response to a test read command and a test pattern data selection signal during a test operation, a memory cell array including a plurality of memory cells and configured to generate read data, a read path unit configured to generate n read data, by serializing the read data, and a test read data generation unit configured to generate n test read data, by comparing the test read pattern data with each of the n read data, generated at a first data rate, and generate the n test read data, at a second data rate lower than the first data rate, during the test operation.
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