公开(公告)号：US12218002B2

公开(公告)日：2025-02-04

申请号：US18537896

申请日：2023-12-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Jin Kang ,  Jong Min Baek ,  Woo Kyung You ,  Kyu-Hee Han ,  Han Seong Kim ,  Jang Ho Lee ,  Sang Shin Jang

IPC: H01L21/768 ,  H01L23/48

Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.

公开(公告)号：US20230307370A1

公开(公告)日：2023-09-28

申请号：US17968050

申请日：2022-10-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jang Ho Lee ,  Woo Kyung You ,  Jong Min Baek

IPC: H01L23/535 ,  H01L23/528 ,  H01L21/768

CPC classification number: H01L23/535 ,  H01L23/5283 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76895

Abstract: A semiconductor device is provided. The semiconductor device includes a first interlayer insulating layer, a lower wiring disposed inside the first interlayer insulating layer, an etching stop layer which includes first to third layers sequentially stacked on the first interlayer insulating layer, a second interlayer insulating layer disposed on the etching stop layer, and a via which penetrates the second interlayer insulating layer and the etching stop layer, the via is connected to the lower wiring, the via includes a first side wall that is in contact with the second layer, and a second side wall that is in contact with the second interlayer insulating layer, the via includes a first protrusion protruding in a horizontal direction from the first side wall inside the first layer, and a second protrusion protruding in the horizontal direction from the first side wall inside the third layer.

公开(公告)号：US11348827B2

公开(公告)日：2022-05-31

申请号：US16798789

申请日：2020-02-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Jin Kang ,  Jong Min Baek ,  Woo Kyung You ,  Kyu-Hee Han ,  Han Seong Kim ,  Jang Ho Lee ,  Sang Shin Jang

IPC: H01L21/768 ,  H01L23/48

Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.

公开(公告)号：US10832948B2

公开(公告)日：2020-11-10

申请号：US16854979

申请日：2020-04-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyu Hee Han ,  Jong Min Baek ,  Viet Ha Nguyen ,  Woo Kyung You ,  Sang Shin Jang ,  Byung Hee Kim

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/311 ,  H01L23/528

Abstract: A semiconductor device includes a first interlayer dielectric film on a substrate, first and second wires respectively extending in a first direction within the first interlayer dielectric film, the first and second wires being adjacent to each other in a second direction different from the first direction, a hard mask pattern on the first interlayer dielectric film, the hard mask pattern including an opening, and an air gap within the first interlayer dielectric film, the air gap including a first portion overlapping vertically with the opening and a second portion not overlapping with the opening in the first direction.

公开(公告)号：US10658231B2

公开(公告)日：2020-05-19

申请号：US15612102

申请日：2017-06-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyu Hee Han ,  Jong Min Baek ,  Viet Ha Nguyen ,  Woo Kyung You ,  Sang Shin Jang ,  Byung Hee Kim

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522 ,  H01L21/311 ,  H01L23/528

Abstract: A semiconductor device includes a first interlayer dielectric film on a substrate, first and second wires respectively extending in a first direction within the first interlayer dielectric film, the first and second wires being adjacent to each other in a second direction different from the first direction, a hard mask pattern on the first interlayer dielectric film, the hard mask pattern including an opening, and an air gap within the first interlayer dielectric film, the air gap including a first portion overlapping vertically with the opening and a second portion not overlapping with the opening in the first direction.

公开(公告)号：US10510658B2

公开(公告)日：2019-12-17

申请号：US16039838

申请日：2018-07-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eui Bok Lee ,  Deok Young Jung ,  Sang Bom Kang ,  Doo-Hwan Park ,  Jong Min Baek ,  Sang Hoon Ahn ,  Hyeok Sang Oh ,  Woo Kyung You

IPC: H01L23/48 ,  H01L23/522 ,  H01L21/768 ,  H01L23/528

Abstract: Semiconductor devices are provided. The semiconductor devices may include a substrate, a first insulating film on the substrate, a lower metal layer in the first insulating film, and a second insulating film on the first insulating film. The lower metal layer may be in the second insulating film, the second insulating film may include a lower surface facing the substrate and an upper surface that is opposite the lower surface, and the upper surface of the second insulating film may be upwardly convex. The semiconductor devices may further include a barrier dielectric film including a recess on the second insulating film, and a via metal layer that is in the recess of the barrier dielectric film and electrically connected with the lower metal layer. The first insulating film and the second insulating film may be sequentially stacked on the substrate in a vertical direction, and a longest vertical distance between an upper surface of the lower metal layer and the substrate may be less than a longest vertical distance between the upper surface of the second insulating film and the substrate.

公开(公告)号：US10304734B2

公开(公告)日：2019-05-28

申请号：US16046081

申请日：2018-07-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woo Kyung You ,  Jong Min Baek ,  Sang Shin Jang ,  Byung Hee Kim ,  Vietha Nguyen ,  Nae In Lee ,  Woo Jin Lee ,  Eun Ji Jung ,  Kyu Hee Han

IPC: H01L21/00 ,  H01L21/768 ,  H01L23/528

Abstract: A semiconductor device includes a first insulating interlayer on a substrate, metal lines in the first insulating interlayer, a first air gap between the metal lines in a first region of the substrate and a second air gap between the first insulating interlayer and at least one of the metal lines in a second region of the substrate, a liner layer covering top surfaces and side walls of the metal lines and a top surface and a side wall of the first insulating interlayer, adjacent to the first and second air gaps, and a second insulating interlayer on the liner layer and contacting the liner layer.

公开(公告)号：US20180033691A1

公开(公告)日：2018-02-01

申请号：US15393506

申请日：2016-12-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woo Kyung You ,  JONG MIN BAEK ,  SANG SHIN JANG ,  BYUNG HEE KIM ,  VIETHA NGUYEN ,  NAE IN LEE ,  WOO JIN LEE ,  EUN JI JUNG ,  KYU HEE HAN

IPC: H01L21/768 ,  H01L23/528

CPC classification number: H01L21/76883 ,  H01L21/76802 ,  H01L21/7682 ,  H01L21/76829 ,  H01L23/528

Abstract: A semiconductor device includes a first insulating interlayer on a substrate, metal lines in the first insulating interlayer, a first air gap between the metal lines in a first region of the substrate and a second air gap between the first insulating interlayer and at least one of the metal lines in a second region of the substrate, a liner layer covering top surfaces and side walls of the metal lines and a top surface and a side wall of the first insulating interlayer, adjacent to the first and second air gaps, and a second insulating interlayer on the liner layer and contacting the liner layer.

公开(公告)号：US11881430B2

公开(公告)日：2024-01-23

申请号：US17826366

申请日：2022-05-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Jin Kang ,  Jong Min Baek ,  Woo Kyung You ,  Kyu-Hee Han ,  Han Seong Kim ,  Jang Ho Lee ,  Sang Shin Jang

IPC: H01L21/768 ,  H01L23/48

CPC classification number: H01L21/76808 ,  H01L23/481 ,  H01L21/76832

Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.

公开(公告)号：US10475739B2

公开(公告)日：2019-11-12

申请号：US15840128

申请日：2017-12-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woo Kyung You ,  Eui Bok Lee ,  Jong Min Baek ,  Su Hyun Bark ,  Jang Ho Lee ,  Sang Hoon Ahn ,  Hyeok Sang Oh

IPC: H01L23/522 ,  H01L23/532 ,  H01L23/528 ,  H01L21/768

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate comprising a lower wire, an etch stop layer on the substrate, an interlayer insulating layer on the etch stop layer, an upper wire disposed in the interlayer insulating layer and separated from the lower wire and a via formed in the interlayer insulating layer and the etch stop layer and connecting the lower wire with the upper wire, wherein the via comprises a first portion in the etch stop layer and a second portion in the interlayer insulating layer, and wherein a sidewall of the first portion of the via increases stepwise.