公开(公告)号：US10224960B2

公开(公告)日：2019-03-05

申请号：US15683505

申请日：2017-08-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Won-Hyung Song

IPC: G11C7/06 ,  H03M13/09 ,  G06F11/10 ,  G11C7/10 ,  G11C11/4076 ,  G11C29/52 ,  H03M13/15 ,  H03M13/29 ,  G11C5/04 ,  G11C29/04

Abstract: A memory device that checks an error of a memory cell and a memory module including the same are disclosed. The memory module includes a first memory device and a second memory device. The first memory device includes a first area in which normal data are stored, and a second area in which error check data are stored. The second memory device stores reliability information about the normal data that is stored in the first area of the first memory device. The first memory device outputs a result of comparing the normal data read from the first area of the first memory device to the error check data read from the second area of the first memory device.

公开(公告)号：US09786354B2

公开(公告)日：2017-10-10

申请号：US15269170

申请日：2016-09-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Hyun Seok ,  Do-Hyung Kim ,  Won-Hyung Song ,  Young-Ho Lee

IPC: H05K7/00 ,  G11C11/4093 ,  G11C5/04 ,  G11C7/02 ,  G11C7/10

CPC classification number: G11C11/4093 ,  G11C5/04 ,  G11C7/02 ,  G11C7/10 ,  G11C2207/105

Abstract: A memory module that includes: a printed circuit board having a connecting terminal; memory chips arranged on the printed circuit board; data buffers disposed on a first surface of the printed circuit board and corresponding to the memory chips; and resistance units disposed on a second surface of the printed circuit board and corresponding to the data buffers.

公开(公告)号：US11848043B2

公开(公告)日：2023-12-19

申请号：US17689064

申请日：2022-03-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Min You ,  Ho-Youn Kim ,  Won-Hyung Song ,  Hi Jung Kim

IPC: G11C11/406 ,  G11C11/408

CPC classification number: G11C11/406 ,  G11C11/4085 ,  G11C11/4087

Abstract: A memory device includes memory cells connected to a first word-line, wherein the memory cells include a data region in which data is stored and a counting value backup region in which the number of times the first word-line is activated is backed up, a counting table for storing a first row address corresponding to the first word-line and a first counting value as a counting result of the number of times the first word-line is activated, and a comparator configured to compare the first counting value with a first backed-up counting value stored in the counting value backup region; and when the first counting value is greater than the first backed-up counting value, back up the first counting value in the counting value backup region, or when the first backed-up counting value is greater than the first counting value, overwrite the first backed-up counting value into the counting table.

公开(公告)号：US09891856B2

公开(公告)日：2018-02-13

申请号：US14953642

申请日：2015-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Won-Hyung Song ,  Duk-Sung Kim ,  Hoki Kim ,  Soo-Woong Ahn ,  Ha-Ryong Yoon ,  Ju-Yun Jung

IPC: G06F12/06 ,  G06F3/06 ,  G11C8/12 ,  G11C7/10

CPC classification number: G06F3/0638 ,  G06F3/0604 ,  G06F3/0629 ,  G06F3/0683 ,  G11C7/10 ,  G11C8/12

Abstract: A memory system includes an address remapping circuit and a first set of memory devices. The address remapping circuit includes a plurality of input terminals for receiving a plurality of chip selection signals and a plurality of chip identification signals. The address remapping circuit receives input signals corresponding to a portion of the plurality of chip selection signals and the plurality of chip identification signals through corresponding input terminals of the plurality of input terminals and generates a plurality of internal chip selection signals based on the input signals and a remapping control signal. Each of the first set of memory devices is configured to be selected in response to a corresponding internal chip selection signal of the plurality of internal chip selection signals.

公开(公告)号：US10795764B2

公开(公告)日：2020-10-06

申请号：US16411127

申请日：2019-05-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dimin Niu ,  Mu-Tien Chang ,  Hongzhong Zheng ,  Hyun-Joong Kim ,  Won-Hyung Song ,  Jangseok Choi

IPC: G06F11/10 ,  G11C29/52 ,  G11C11/4093

Abstract: A data chip that may pollute data is disclosed. The data chip may include a data array, read circuitry to read raw data from the data array, and a buffer to store the raw data. Using a pollution pattern stored in a mask register, a data pollution engine may pollute the raw data. Transmission circuitry may then transmit the polluted data.

公开(公告)号：US10013341B2

公开(公告)日：2018-07-03

申请号：US15371825

申请日：2016-12-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Oh-Seong Kwon ,  Jinhyun Kim ,  Won-Hyung Song ,  Jihyun Choi

IPC: G06F12/00 ,  G06F12/02 ,  G06F3/06 ,  G11C8/18 ,  G11C5/04 ,  G11C7/10 ,  G11C8/12 ,  G11C11/4076 ,  G11C11/408 ,  G11C11/4093

CPC classification number: G06F12/00 ,  G06F3/0604 ,  G06F3/0629 ,  G06F3/0683 ,  G06F12/02 ,  G11C5/04 ,  G11C7/1042 ,  G11C7/1057 ,  G11C8/12 ,  G11C8/18 ,  G11C11/4076 ,  G11C11/408 ,  G11C11/4093 ,  G11C2207/2209

Abstract: A semiconductor memory device includes a first memory area in the semiconductor memory device, and a second memory area in the semiconductor memory device. The second memory area is accessed independently of the first memory area based on a usage selecting signal. The first and second memory areas share command and address lines, and perform a rank interleaving operation based on the usage selecting signal.

公开(公告)号：US12020742B2

公开(公告)日：2024-06-25

申请号：US17734508

申请日：2022-05-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won-Hyung Song ,  Jung Min You ,  Seong-Jin Cho

IPC: G11C11/401 ,  G11C11/4072 ,  G11C11/408 ,  G11C11/4091 ,  G11C11/4093 ,  G11C11/4096

CPC classification number: G11C11/4072 ,  G11C11/4085 ,  G11C11/4087 ,  G11C11/4091 ,  G11C11/4093 ,  G11C11/4096

Abstract: Disclosed is a method for accessing memory cells arranged in rows and columns. The method includes activating a specific row of the rows of the memory cells, and flipping data bits stored in memory cells of the specific row in response to determining that concentrated activation occurs at the specific row.

公开(公告)号：US10908993B2

公开(公告)日：2021-02-02

申请号：US16411122

申请日：2019-05-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dimin Niu ,  Mu-Tien Chang ,  Hongzhong Zheng ,  Hyun-Joong Kim ,  Won-Hyung Song ,  Jangseok Choi

IPC: G06F11/10 ,  G11C29/52 ,  G11C11/4093

Abstract: A memory controller is disclosed. The memory controller may include read circuitry to request a value at an address stored in a plurality of data chips, parity circuitry to calculate a parity from original data received from the plurality of the data chips, pollution pattern analysis circuitry to compare the parity with a plurality of pollution patterns programmed into the plurality of the data chips to identify a data chip with an error, and error correction circuitry to correct the error in the original data received from the identified data chip with the error.

公开(公告)号：US20170131933A1

公开(公告)日：2017-05-11

申请号：US15346342

申请日：2016-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： JIN-HYUN KIM ,  Won-Hyung Song

IPC: G06F3/06 ,  G06F13/16 ,  G06F17/50 ,  G06F13/40 ,  G11C11/408 ,  G11C11/4096

CPC classification number: G06F13/1668 ,  G06F13/4068 ,  G06F17/5072 ,  G06F17/5077 ,  G11C5/025 ,  G11C7/1006 ,  G11C11/4096 ,  Y02D10/14 ,  Y02D10/151

Abstract: Provided are a semiconductor device and a semiconductor system. A semiconductor device includes a memory cell array; a standard cell region in which first type standard cells implemented to perform a first operation for accessing the memory cell array and second type standard cells performing the first operation and having performance characteristics different from performance characteristics of the first type standard cells are arranged; and a ROM including a program that performs place and route for the standard cells arranged in the standard cell region.

公开(公告)号：US10394648B2

公开(公告)日：2019-08-27

申请号：US15410752

申请日：2017-01-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dimin Niu ,  Mu-Tien Chang ,  Hongzhong Zheng ,  Hyun-Joong Kim ,  Won-Hyung Song ,  Jangseok Choi

IPC: G06F11/10 ,  G11C11/4093 ,  G11C29/52

Abstract: A data chip that may pollute data is disclosed. The data chip may include a data array, read circuitry to read raw data from the data array, and a buffer to store the raw data. Using a pollution pattern stored in a mask register, a data pollution engine may pollute the raw data. Transmission circuitry may then transmit the polluted data.