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公开(公告)号:US20220238691A1
公开(公告)日:2022-07-28
申请号:US17720198
申请日:2022-04-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sunmin MOON , Young-Lim PARK , Kyuho CHO , HANJIN LIM
IPC: H01L29/51 , H01L21/762 , H01L29/15 , H01L29/06 , H01L27/108 , H01L49/02
Abstract: Disclosed is a semiconductor device including a bottom electrode, a dielectric layer, and a top electrode that are sequentially disposed on a substrate. The dielectric layer includes a hafnium oxide layer including hafnium oxide having a tetragonal crystal structure, and an oxidation seed layer including an oxidation seed material. The oxidation seed material has a lattice constant having a lattice mismatch of 6% or less with one of a horizontal lattice constant and a vertical lattice constant of the hafnium oxide having the tetragonal crystal structure.
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公开(公告)号:US20210343524A1
公开(公告)日:2021-11-04
申请号:US17376403
申请日:2021-07-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younsoo KIM , Haeryong KIM , Seungmin RYU , Sunmin MOON , Jeonggyu SONG , Changsu WOO , Kyooho JUNG , Younjoung CHO
IPC: H01L21/02
Abstract: A method of forming an oxide film including two non-oxygen elements includes providing a first source material on a substrate, the first source material including a first central element, providing an electron donor compound to be bonded to the first source material, providing a second source material on the substrate after the providing of the electron donor compound, the second source material including a second central element, and providing an oxidant on the substrate.
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公开(公告)号:US20250133746A1
公开(公告)日:2025-04-24
申请号:US18745377
申请日:2024-06-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Minho SONG , Sunmin MOON , Jaewan CHANG
IPC: H10B53/30
Abstract: A semiconductor device includes a capacitor structure including a bottom electrode, a first dielectric layer on the bottom electrode, a second dielectric layer on the first dielectric layer, a third dielectric layer on the second dielectric layer, and a top electrode on the third dielectric layer, where each of the first dielectric layer and the third dielectric layer includes zirconium oxide, the second dielectric layer includes hafnium-zirconium oxide, and each of the first dielectric layer, the second dielectric layer, and the third dielectric layer includes a first crystal phase and a second crystal phase.
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公开(公告)号:US20230255019A1
公开(公告)日:2023-08-10
申请号:US18136984
申请日:2023-04-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Chang-Su WOO , Haeryong KIM , Younsoo KIM , Sunmin MOON , Jeonggyu SONG , Kyooho JUNG
IPC: H10B12/00
CPC classification number: H10B12/315 , H10B12/033 , H10B12/34
Abstract: A semiconductor device includes conductive pillars on a semiconductor substrate, a first support pattern that contacts first portions of lateral surfaces of the conductive pillars and connects the conductive pillars to each other, the first support pattern including first support holes that expose second portions of the lateral surfaces of the conductive pillars, a capping conductive pattern that contacts the second portions of the lateral surfaces of the conductive pillars and exposes the first support pattern, the second portions of the lateral surfaces of the conductive pillars being in no contact with the first support pattern, and a dielectric layer that covers the first support pattern and the capping conductive pattern, the dielectric layer being spaced apart from the conductive pillars.
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公开(公告)号:US20190013391A1
公开(公告)日:2019-01-10
申请号:US15995049
申请日:2018-05-31
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sunmin MOON , Young-Lim PARK , Kyuho CHO , HANJIN LIM
IPC: H01L29/51 , H01L29/06 , H01L29/15 , H01L21/762
Abstract: Disclosed is a semiconductor device including a bottom electrode, a dielectric layer, and a top electrode that are sequentially disposed on a substrate. The dielectric layer includes a hafnium oxide layer including hafnium oxide having a tetragonal crystal structure, and an oxidation seed layer including an oxidation seed material. The oxidation seed material has a lattice constant having a lattice mismatch of 6% or less with one of a horizontal lattice constant and a vertical lattice constant of the hafnium oxide having the tetragonal crystal structure.
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公开(公告)号:US20230062485A1
公开(公告)日:2023-03-02
申请号:US17683506
申请日:2022-03-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hanjin LIM , Younsoo KIM , Sunmin MOON , Jungmin PARK , Hyungsuk JUNG
Abstract: A batch-type apparatus for atomic layer etching (ALE), which is capable of ALE-processing several wafers at the same time, and an ALE method and a semiconductor device manufacturing method based on the batch-type apparatus, are provided. The batch-type apparatus for ALE includes a wafer stacking container in which a plurality of wafers are arranged in a vertical direction, an inner tube extending in the vertical direction, a plurality of nozzles arranged in a first outer portion in the inner tube in a horizontal direction, and a heater surrounding the inner tube and configured to adjust a temperature in the inner tube, wherein gas injection holes are formed corresponding to a height of the plurality of wafers in each of the plurality of nozzles, and a gas outlet is formed in a second outer portion in the inner tube, opposite to the first outer portion.
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公开(公告)号:US20210359102A1
公开(公告)日:2021-11-18
申请号:US17390864
申请日:2021-07-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sunmin MOON , Young-Lim PARK , Kyuho CHO , HANJIN LIM
IPC: H01L29/51 , H01L21/762 , H01L29/15 , H01L29/06 , H01L27/108 , H01L49/02
Abstract: Disclosed is a semiconductor device including a bottom electrode, a dielectric layer, and a top electrode that are sequentially disposed on a substrate. The dielectric layer includes a hafnium oxide layer including hafnium oxide having a tetragonal crystal structure, and an oxidation seed layer including an oxidation seed material. The oxidation seed material has a lattice constant having a lattice mismatch of 6% or less with one of a horizontal lattice constant and a vertical lattice constant of the hafnium oxide having the tetragonal crystal structure.
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公开(公告)号:US20210028010A1
公开(公告)日:2021-01-28
申请号:US16791189
申请日:2020-02-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younsoo KIM , Haeryong KIM , Seungmin RYU , Sunmin MOON , Jeonggyu SONG , Changsu WOO , Kyooho JUNG , Younjoung CHO
IPC: H01L21/02
Abstract: A method of forming an oxide film including two non-oxygen elements includes providing a first source material on a substrate, the first source material including a first central element, providing an electron donor compound to be bonded to the first source material, providing a second source material on the substrate after the providing of the electron donor compound, the second source material including a second central element, and providing an oxidant on the substrate.
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公开(公告)号:US20240304663A1
公开(公告)日:2024-09-12
申请号:US18417150
申请日:2024-01-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Chunhum CHO , Sunmin MOON , Dongkwan BAEK , Jaewan CHANG
CPC classification number: H01L28/91 , H10B12/033
Abstract: The capacitor structure includes a lower electrode on a substrate; a support layer on a sidewall of the lower electrode, the support layer including an insulating material; an interface structure having a first interface pattern on the sidewall of the lower electrode, the first interface pattern including a first metal, and a second interface pattern including a first portion on an outer sidewall of the first interface pattern and a second portion on a surface of the support layer, the second interface pattern including an oxide of a second metal, a dielectric pattern on the interface structure; and an upper electrode on the dielectric pattern, wherein the second portion of the second interface pattern further includes the first metal.
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公开(公告)号:US20210384194A1
公开(公告)日:2021-12-09
申请号:US17172131
申请日:2021-02-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Chang-Su WOO , Haeryong KIM , Younsoo KIM , Sunmin MOON , Jeonggyu SONG , Kyooho JUNG
IPC: H01L27/108
Abstract: A semiconductor device includes conductive pillars on a semiconductor substrate, a first support pattern that contacts first portions of lateral surfaces of the conductive pillars and connects the conductive pillars to each other, the first support pattern including first support holes that expose second portions of the lateral surfaces of the conductive pillars, a capping conductive pattern that contacts the second portions of the lateral surfaces of the conductive pillars and exposes the first support pattern, the second portions of the lateral surfaces of the conductive pillars being in no contact with the first support pattern, and a dielectric layer that covers the first support pattern and the capping conductive pattern, the dielectric layer being spaced apart from the conductive pillars.
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