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公开(公告)号:US09978835B2
公开(公告)日:2018-05-22
申请号:US15339690
申请日:2016-10-31
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jung-Gil Yang , Sang-Su Kim , Sung-Gi Hur
IPC: H01L29/06 , H01L29/267 , H01L29/786 , H01L29/423 , H01L29/20 , H01L21/02 , H01L29/66 , H01L27/088 , H01L29/78 , H01L29/08 , H01L29/16 , H01L29/161 , H01L21/8234 , H01L27/092
CPC classification number: H01L29/0673 , H01L21/02233 , H01L21/823412 , H01L27/088 , H01L27/092 , H01L29/0642 , H01L29/0676 , H01L29/068 , H01L29/0847 , H01L29/16 , H01L29/1608 , H01L29/161 , H01L29/20 , H01L29/267 , H01L29/42392 , H01L29/66545 , H01L29/66742 , H01L29/66795 , H01L29/785 , H01L29/78684 , H01L29/78696
Abstract: A semiconductor device includes at least one nanowire that is disposed over a substrate, extends to be spaced apart from the substrate, and includes a channel region, a gate that surrounds at least a part of the channel region, and a gate dielectric film that is disposed between the channel region and the gate. A source/drain region that contacts one end of the at least one nanowire is formed in a semiconductor layer that extends from the substrate to the one end of the at least one nanowire. Insulating spacers are formed between the substrate and the at least one nanowire. The insulating spacers are disposed between the gate and the source/drain region and are formed of a material that is different from a material of the gate dielectric film.
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公开(公告)号:US09324812B2
公开(公告)日:2016-04-26
申请号:US14489418
申请日:2014-09-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jung-Gil Yang , Sang-Su Kim , Sung-Gi Hur
IPC: H01L29/06 , H01L29/267 , H01L29/20 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/786 , H01L21/8234 , H01L27/088 , H01L27/092
CPC classification number: H01L29/0673 , H01L21/02233 , H01L21/823412 , H01L27/088 , H01L27/092 , H01L29/0642 , H01L29/0676 , H01L29/068 , H01L29/0847 , H01L29/16 , H01L29/1608 , H01L29/161 , H01L29/20 , H01L29/267 , H01L29/42392 , H01L29/66545 , H01L29/66742 , H01L29/66795 , H01L29/785 , H01L29/78684 , H01L29/78696
Abstract: A semiconductor device includes at least one nanowire that is disposed over a substrate, extends to be spaced apart from the substrate, and includes a channel region, a gate that surrounds at least a part of the channel region, and a gate dielectric film that is disposed between the channel region and the gate. A source/drain region that contacts one end of the at least one nanowire is formed in a semiconductor layer that extends from the substrate to the one end of the at least one nanowire. Insulating spacers are formed between the substrate and the at least one nanowire. The insulating spacers are disposed between the gate and the source/drain region and are formed of a material that is different from a material of the gate dielectric film.
Abstract translation: 半导体器件包括至少一个纳米线,其被布置在衬底上,延伸成与衬底间隔开,并且包括通道区域,围绕沟道区域的至少一部分的栅极和栅极电介质膜,栅极电介质膜是 设置在通道区域和栅极之间。 接触至少一个纳米线的一端的源/漏区形成在从衬底延伸到至少一个纳米线的一端的半导体层中。 在衬底和至少一个纳米线之间形成绝缘间隔物。 绝缘垫片设置在栅极和源极/漏极区域之间,并且由与栅极电介质膜的材料不同的材料形成。
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公开(公告)号:US09515147B2
公开(公告)日:2016-12-06
申请号:US15075888
申请日:2016-03-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jung-Gil Yang , Sang-Su Kim , Sung-Gi Hur
IPC: H01L21/00 , H01L29/267 , H01L29/06 , H01L29/20 , H01L21/02 , H01L29/66 , H01L29/786 , H01L29/423 , H01L29/78 , H01L21/8234 , H01L27/088 , H01L27/092
CPC classification number: H01L29/0673 , H01L21/02233 , H01L21/823412 , H01L27/088 , H01L27/092 , H01L29/0642 , H01L29/0676 , H01L29/068 , H01L29/0847 , H01L29/16 , H01L29/1608 , H01L29/161 , H01L29/20 , H01L29/267 , H01L29/42392 , H01L29/66545 , H01L29/66742 , H01L29/66795 , H01L29/785 , H01L29/78684 , H01L29/78696
Abstract: A semiconductor device includes at least one nanowire that is disposed over a substrate, extends to be spaced apart from the substrate, and includes a channel region, a gate that surrounds at least a part of the channel region, and a gate dielectric film that is disposed between the channel region and the gate. A source/drain region that contacts one end of the at least one nanowire is formed in a semiconductor layer that extends from the substrate to the one end of the at least one nanowire. Insulating spacers are formed between the substrate and the at least one nanowire. The insulating spacers are disposed between the gate and the source/drain region and are formed of a material that is different from a material of the gate dielectric film.
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