公开(公告)号：US20140210017A1

公开(公告)日：2014-07-31

申请号：US14243358

申请日：2014-04-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myeongcheol Kim ,  Sooyeon Jeong ,  Joon Goo Hong ,  Dohyoung Kim ,  Yongjin Kim ,  Jin Wook Lee ,  Yoonhae Kim

IPC: H01L29/49

CPC classification number: H01L29/4966 ,  H01L21/76804 ,  H01L21/76831 ,  H01L21/76895 ,  H01L21/76897 ,  H01L29/4958 ,  H01L29/4975 ,  H01L29/66545

Abstract: A semiconductor device and a method of forming the semiconductor device includes: forming gate electrodes on a semiconductor substrate and forming spacers on both side surfaces of the gate electrodes; forming capping patterns on the gate electrodes; and forming a metal contact between the gate electrodes. Each of the capping patterns is formed to have a width greater than a width of each of the gate electrodes.

Abstract translation: 半导体器件和形成半导体器件的方法包括：在半导体衬底上形成栅电极并在栅电极的两个侧表面上形成间隔物; 在栅电极上形成封盖图案; 以及在栅电极之间形成金属接触。 每个封盖图案形成为具有大于每个栅电极的宽度的宽度。

公开(公告)号：US11264482B2

公开(公告)日：2022-03-01

申请号：US16572681

申请日：2019-09-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghyun Kim ,  Inhyun Song ,  Yeongmin Jeon ,  Sejin Park ,  Juyun Park ,  Jonghoon Baek ,  Taeyeon Shin ,  Sooyeon Jeong

IPC: H01L29/66 ,  H01L21/8234 ,  H01L29/78 ,  H01L27/088

Abstract: A semiconductor device may include: a dummy gate structure including a first gate pattern in which dummy gate lines extending in one direction are connected to each other on a substrate, and a second gate pattern in which dummy gate lines extending in the one direction are connected to each other on the same line with the first gate pattern; and a third gate pattern extending in parallel with the dummy gate structure on one side of the dummy gate structure.

公开(公告)号：US09559102B2

公开(公告)日：2017-01-31

申请号：US14976105

申请日：2015-12-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yoonhae Kim ,  Myungil Kang ,  Sooyeon Jeong

IPC: H01L29/78 ,  H01L27/092 ,  H01L27/088

CPC classification number: H01L27/0922 ,  H01L21/823425 ,  H01L21/823431 ,  H01L21/823814 ,  H01L21/823821 ,  H01L27/0207 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/785

Abstract: A semiconductor device includes first and second active regions. Each active region includes a plurality of fin protrusions and a recessed area disposed between the fin protrusions. A plurality of gate structures are disposed on each of the plurality of fin protrusions. A semiconductor layer is disposed in each recessed area. A distance between the gate structures of the first active region is the same as a distance between the gate structures of the second active region, and a height difference between a bottom surface of the semiconductor layer of the first recessed area and a top surface of each of the fin protrusions of the first active region is smaller than a height difference between a bottom surface of the semiconductor layer of the recessed area of the second active region and a top surface of each of the fin protrusions of the second active region.

Abstract translation: 半导体器件包括第一和第二有源区。 每个有源区域包括多个翅片突出部和设置在翅片突出部之间的凹陷区域。 多个栅极结构设置在多个翅片突起中的每一个上。 半导体层设置在每个凹陷区域中。 第一有源区域的栅极结构之间的距离与第二有源区域的栅极结构之间的距离与第一凹入区域的半导体层的底表面和每个第一有源区域的顶表面之间的高度差相同 第一有源区的鳍突起的距离小于第二有源区的凹陷区域的半导体层的底表面和第二有源区的每个鳍突起的顶表面之间的高度差。