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公开(公告)号:US09396979B2
公开(公告)日:2016-07-19
申请号:US14635147
申请日:2015-03-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yeon-sik Choo , Soo-Jae Park , Jae-Heon Noh , Yong-Sang Cho
IPC: H01L21/673
CPC classification number: H01L21/67393
Abstract: A wafer carrier comprises a body part constructed and arranged to accommodate a wafer and including first and second layers which are stacked in sequence. A cover is mountable to the body part. A first air filter is positioned on the cover. A second air filter is positioned on a side of the body part. The second layer is positioned between the first layer and an inner region of the body part. A surface of the second layer facing the inner region is subjected to charge prevention processing.
Abstract translation: 晶片载体包括构造和布置成容纳晶片并包括依次层叠的第一和第二层的主体部分。 一个盖可以安装到身体部位。 第一个空气过滤器位于盖子上。 第二空气过滤器位于身体部分的一侧。 第二层位于主体部分的第一层和内部区域之间。 面对内部区域的第二层的表面经受电荷防止处理。
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公开(公告)号:US10950517B2
公开(公告)日:2021-03-16
申请号:US16781410
申请日:2020-02-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Soo-Jae Park
IPC: H01L23/31 , H01L23/498 , H01L21/683 , H01L21/48 , H01L23/00
Abstract: A printed circuit board (PCB) includes an insulating layer with an upper surface and a lower surface opposite to the upper surface; a first conductive pattern on the upper surface of the insulating layer; a second conductive pattern on the lower surface of the insulating layer; an aluminum pattern that covers at least a portion of an upper surface of the first conductive pattern; and a first passivation layer that covers at least a portion of sides of the first conductive pattern and that prevents diffusion into the first conductive pattern.
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公开(公告)号:US10586748B2
公开(公告)日:2020-03-10
申请号:US15402876
申请日:2017-01-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Soo-Jae Park
IPC: H01L23/498 , H01L21/48 , H01L23/31 , H01L23/00 , H01L21/683
Abstract: A printed circuit board (PCB) includes an insulating layer with an upper surface and a lower surface opposite to the upper surface; a first conductive pattern on the upper surface of the insulating layer; a second conductive pattern on the lower surface of the insulating layer; an aluminum pattern that covers at least a portion of an upper surface of the first conductive pattern; and a first passivation layer that covers at least a portion of sides of the first conductive pattern and that prevents diffusion into the first conductive pattern.
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公开(公告)号:US20170309559A1
公开(公告)日:2017-10-26
申请号:US15402876
申请日:2017-01-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Soo-Jae Park
IPC: H01L23/498 , H01L21/683 , H01L23/31 , H01L21/48 , H01L23/00
Abstract: A printed circuit board (PCB) includes an insulating layer with an upper surface and a lower surface opposite to the upper surface; a first conductive pattern on the upper surface of the insulating layer; a second conductive pattern on the lower surface of the insulating layer; an aluminum pattern that covers at least a portion of an upper surface of the first conductive pattern; and a first passivation layer that covers at least a portion of sides of the first conductive pattern and that prevents diffusion into the first conductive pattern.
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公开(公告)号:US09368465B2
公开(公告)日:2016-06-14
申请号:US14514704
申请日:2014-10-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Soo-Jae Park , Hyun-Suk Chun
IPC: H01L21/00 , H01L23/00 , H01L21/768
CPC classification number: H01L24/11 , H01L21/76841 , H01L21/76877 , H01L21/76895 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/13 , H01L2224/02125 , H01L2224/02126 , H01L2224/02145 , H01L2224/0215 , H01L2224/03614 , H01L2224/0401 , H01L2224/05014 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05184 , H01L2224/05555 , H01L2224/05556 , H01L2224/05572 , H01L2224/0558 , H01L2224/05647 , H01L2224/05655 , H01L2224/06131 , H01L2224/11462 , H01L2224/1147 , H01L2224/11831 , H01L2224/11916 , H01L2224/13017 , H01L2224/13022 , H01L2224/13024 , H01L2224/13083 , H01L2224/131 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2924/07025 , H01L2924/3512 , H01L2924/00014 , H01L2924/00012 , H01L2924/014
Abstract: The method includes forming an upper layer on a lower layer, forming a metal interconnection in the upper layer, forming a passivation layer exposing a center part of the metal interconnection on the upper layer, forming a buffer pattern exposing the center part of the metal interconnection, and selectively and asymmetrically covering a peripheral region of the metal interconnect and a part of the passivation layer, forming a wrapping pattern covering the buffer pattern and exposing the center part of the metal interconnection on the passivation layer, and forming a pad pattern on the center part of the metal interconnection.
Abstract translation: 该方法包括在下层上形成上层,在上层形成金属互连,形成钝化层,暴露上层金属互连的中心部分,形成露出金属互连中心部分的缓冲图案 并且选择性地和不对称地覆盖金属互连的周边区域和钝化层的一部分,形成覆盖缓冲图案的包覆图案,并使钝化层上的金属互连的中心部分露出,并在 中心部分金属互连。
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公开(公告)号:US20160049320A1
公开(公告)日:2016-02-18
申请号:US14635147
申请日:2015-03-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yeon-sik Choo , Soo-Jae Park , Jae-Heon Noh , Yong-Sang Cho
IPC: H01L21/673
CPC classification number: H01L21/67393
Abstract: A wafer carrier comprises a body part constructed and arranged to accommodate a wafer and including first and second layers which are stacked in sequence. A cover is mountable to the body part. A first air filter is positioned on the cover. A second air filter is positioned on a side of the body part. The second layer is positioned between the first layer and an inner region of the body part. A surface of the second layer facing the inner region is subjected to charge prevention processing.
Abstract translation: 晶片载体包括被构造和布置成容纳晶片并包括按顺序堆叠的第一和第二层的主体部分。 一个盖可以安装到身体部位。 第一个空气过滤器位于盖子上。 第二空气过滤器位于身体部分的一侧。 第二层位于主体部分的第一层和内部区域之间。 面对内部区域的第二层的表面经受电荷防止处理。
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