公开(公告)号：US09411356B2

公开(公告)日：2016-08-09

申请号：US13853503

申请日：2013-03-29

Applicant: Samsung Electronics Co. Ltd. ,  SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION

Inventor： Se-Hee Han ,  Joo-Yeol Lee ,  Yong-Tae Yoon ,  Young-Gyu Jin ,  Hyeong-Ig Kim ,  Si-Young Lee

IPC: G05F5/00 ,  H02J1/00 ,  H02J3/00 ,  H02J3/38 ,  B60L11/18

CPC classification number: G05F5/00 ,  B60L11/1816 ,  B60L11/1844 ,  B60L11/1846 ,  B60L2240/80 ,  B60L2250/14 ,  H02J1/00 ,  H02J3/00 ,  H02J3/382 ,  H02J2003/007 ,  Y02E60/721 ,  Y02T10/7005 ,  Y02T10/7072 ,  Y02T10/7094 ,  Y02T90/121 ,  Y02T90/128 ,  Y02T90/14 ,  Y02T90/163 ,  Y02T90/169 ,  Y04S10/126 ,  Y04S30/14

Abstract: An apparatus and method for collecting power from distributed power supply resources are provided. The method includes transmitting a signal for inquiring whether supply of demand-side power supply resources is possible to a providing side that provides demand-side power supply resources, selecting demand-side power supply resources to be utilized, based on power supply resource-related information for each of available demand-side power supply resources, which is received from the providing side, and notifying the selection results to the selected demand-side power supply resources.

Abstract translation: 提供了一种从分散供电资源收集电力的装置和方法。 该方法包括发送信号，用于询问是否可以向提供需求侧供电资源的提供方提供需求侧电源资源，根据供电资源相关的方式选择要使用的需求侧供电资源 从提供侧接收的每个可用的需求侧电源资源的信息，以及将选择结果通知所选择的需求侧电源资源。

公开(公告)号：US20140124834A1

公开(公告)日：2014-05-08

申请号：US14017833

申请日：2013-09-04

Applicant: FUJIFILM CORPORATION ,  SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyung-Rae Lee ,  Keita Kato ,  Atsushi Nakamura ,  Yool Kang ,  Suk-Koo Hong ,  Jae-Ho Kim ,  Dong-Jun Lee ,  Si-Young Lee

IPC: H01L21/308 ,  H01L27/092 ,  H01L29/78

CPC classification number: H01L29/7848 ,  G03F7/0045 ,  G03F7/0046 ,  G03F7/0397 ,  G03F7/325 ,  G03F7/405 ,  H01L21/0274 ,  H01L21/3083 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/165 ,  H01L29/66636

Abstract: A method of fabricating a semiconductor device is disclosed comprising the steps of: providing a substrate having a first region, a second region and a plurality of gate electrodes which are formed on the first and second regions of the substrate; forming a mask film to expose the first region of the substrate while covering the second region of the substrate, such that the mask film has a negative lateral profile at a boundary between the first and second regions of the substrate; forming sigma trenches in the first region of the substrate by etching the first region of the substrate using the mask film and the gate electrodes as a mask; and forming an epitaxial layer in each of the sigma trenches.

Abstract translation: 公开了制造半导体器件的方法，包括以下步骤：提供形成在衬底的第一和第二区域上的具有第一区域，第二区域和多个栅电极的衬底; 形成掩模膜以在覆盖基板的第二区域的同时露出基板的第一区域，使得掩模膜在基板的第一和第二区域之间的边界处具有负的横向轮廓; 通过使用掩模膜和栅电极作为掩模蚀刻衬底的第一区域，在衬底的第一区域中形成硅沟槽; 以及在每个σ沟槽中形成外延层。

公开(公告)号：US09696774B2

公开(公告)日：2017-07-04

申请号：US13853613

申请日：2013-03-29

Applicant: Samsung Electronics Co., Ltd. ,  Seoul National University R&DB Foundation

Inventor： Se-Hee Han ,  Joo-Yeol Lee ,  Yong-Tae Yoon ,  Young-Gyu Jin ,  Hyeong-Ig Kim ,  Si-Young Lee

IPC: G05D11/00 ,  G06F1/26 ,  G05B13/02 ,  G06Q10/06

CPC classification number: G06F1/26 ,  G05B13/024 ,  G06Q10/06

Abstract: A demand response apparatus receives from a supply resource utilizing apparatus a signal indicating whether power supply from the demand response apparatus to the supply resource utilizing apparatus is possible, estimates a first power usage of the demand response apparatus for a first time interval, changes an operation of the demand response apparatus, estimates a second power usage for a second time interval after the changing of the operation of the demand response apparatus, calculates supply power available to the supply resource utilizing apparatus based on the estimated first power usage and the estimated second power usage, and transmits information about the available supply power to the supply resource utilizing apparatus.

公开(公告)号：US09406513B2

公开(公告)日：2016-08-02

申请号：US14186055

申请日：2014-02-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Si-Young Lee ,  Young-hee Lee ,  Jae-young Choi

IPC: H01L29/16 ,  H01L21/18 ,  H01L29/786 ,  H01L29/778

CPC classification number: H01L21/18 ,  H01L29/1606 ,  H01L29/778 ,  H01L29/78684

Abstract: A graphene laminate includes a first piezoelectric material layer having a negatively-charged surface and a positively-charged surface, a first graphene layer under the first piezoelectric material layer, the first graphene layer contacting the positively-charged surface of the first piezoelectric material layer, a second graphene layer underlying the first graphene layer, and a second piezoelectric material layer under the second graphene layer, the second piezoelectric material layer having a negatively-charged surface and a positively-charged surface, the negatively-charged surface contacting the second graphene layer.

Abstract translation: 石墨烯层压体包括具有带负电荷的表面和带正电荷的表面的第一压电材料层，在第一压电材料层下面的第一石墨烯层，与第一压电材料层的带正​​电表面相接触的第一石墨烯层， 在第一石墨烯层下面的第二石墨烯层，以及在第二石墨烯层下面的第二压电材料层，第二压电材料层具有带负电荷的表面和带正电的表面，与第二石墨烯层接触的带负电的表面 。

公开(公告)号：US08987118B2

公开(公告)日：2015-03-24

申请号：US14017833

申请日：2013-09-04

Applicant: Samsung Electronics Co., Ltd. ,  Fujifilm Corporation

Inventor： Hyung-Rae Lee ,  Keita Kato ,  Atsushi Nakamura ,  Yool Kang ,  Suk-Koo Hong ,  Jae-Ho Kim ,  Dong-Jun Lee ,  Si-Young Lee

IPC: H01L21/20 ,  H01L29/78 ,  H01L29/66 ,  H01L21/027 ,  H01L21/8238 ,  H01L21/308 ,  G03F7/004 ,  G03F7/039 ,  G03F7/32 ,  G03F7/40 ,  H01L29/165

CPC classification number: H01L29/7848 ,  G03F7/0045 ,  G03F7/0046 ,  G03F7/0397 ,  G03F7/325 ,  G03F7/405 ,  H01L21/0274 ,  H01L21/3083 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/165 ,  H01L29/66636

Abstract: A method of fabricating a semiconductor device is disclosed comprising the steps of: providing a substrate having a first region, a second region and a plurality of gate electrodes which are formed on the first and second regions of the substrate; forming a mask film to expose the first region of the substrate while covering the second region of the substrate, such that the mask film has a negative lateral profile at a boundary between the first and second regions of the substrate; forming sigma trenches in the first region of the substrate by etching the first region of the substrate using the mask film and the gate electrodes as a mask; and forming an epitaxial layer in each of the sigma trenches.

Abstract translation: 公开了制造半导体器件的方法，包括以下步骤：提供形成在衬底的第一和第二区域上的具有第一区域，第二区域和多个栅电极的衬底; 形成掩模膜以在覆盖基板的第二区域的同时露出基板的第一区域，使得掩模膜在基板的第一和第二区域之间的边界处具有负的横向轮廓; 通过使用掩模膜和栅电极作为掩模蚀刻衬底的第一区域，在衬底的第一区域中形成硅沟槽; 以及在每个σ沟槽中形成外延层。