公开(公告)号：US20220330439A1

公开(公告)日：2022-10-13

申请号：US17708295

申请日：2022-03-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taegyun KIM ,  Junghyun KANG ,  Kijung KIM ,  Shinhun MOON ,  Seunghyun CHO ,  Seongho HONG

IPC: H05K5/00 ,  H05K1/02 ,  H02J7/00 ,  H02J50/00 ,  G04G21/02 ,  G04G9/00

Abstract: An electronic device is disclosed, including a housing having a front plate, a back plate facing the front plate, and a side frame surrounding a space defined between the front and back plates, a circuit board disposed within the housing, a module assembly disposed between the circuit board and the back plate, and electrically connected with the circuit board, wherein the module assembly includes: an optical sensor module including a flexible printed circuit board (FPCB) including a first surface and a second surface facing away from the first surface, a light emitting part disposed on the first surface of the FPCB, and a light receiving part disposed on the first surface spaced apart from the light emitting part, and a wireless charging module surrounding the FPCB of the optical sensor module, and at least partially coupled to the FPCB so as to be integrated with the FPCB.

公开(公告)号：US20220107890A1

公开(公告)日：2022-04-07

申请号：US17551707

申请日：2021-12-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joonsik SOHN ,  Hyunjoong KIM ,  Woongjae SONG ,  Soowoong AHN ,  Seunghyun CHO ,  Jihyun CHOI

IPC: G06F12/06 ,  H01L23/48 ,  H01L25/065 ,  G11C8/00

Abstract: According to some example embodiments of the inventive concepts, there is provided a method of operating a stacked memory device including a plurality of memory dies stacked in a vertical direction, the method including receiving a command and an address from a memory controller, determining a stack ID indicating a subset of the plurality of memory dies by decoding the address, and accessing at least two memory dies among the subset of memory dies corresponding to the stack ID such that the at least two memory dies are non-adjacent.

公开(公告)号：US20240090211A1

公开(公告)日：2024-03-14

申请号：US18135349

申请日：2023-04-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soyeon KIM ,  Sung-Min HWANG ,  Dong-Sik LEE ,  Seunghyun CHO ,  Bongtae PARK ,  Jae-Joo SHIM

IPC: H10B41/27 ,  H01L23/528 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

CPC classification number: H10B41/27 ,  H01L23/5283 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B80/00

Abstract: A semiconductor memory device includes a gate stack structure including insulating layers, a lower selection line and word lines, the word lines including a first word line adjacent to the lower selection line and a second word line on the first word line, a memory channel structure penetrating the gate stack structure, a plurality of first contact plugs electrically connected to the first word line, a plurality of second contact plugs electrically connected to the second word line, a first conductive line connected to the plurality of first contact plugs, and a second conductive line connected to one of the plurality of second contact plugs.

公开(公告)号：US20230176530A1

公开(公告)日：2023-06-08

申请号：US18159950

申请日：2023-01-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seunghyun CHO ,  June LEE ,  Junhui LEE

IPC: G04G17/06 ,  G04G17/08 ,  G04G21/02

CPC classification number: G04G17/06 ,  G04G17/08 ,  G04G21/025

Abstract: An electronic device is provided. The electronic device includes a housing, a button member which is coupled to the housing and at least a portion of which is exposed to the outside of the housing, a bracket which is disposed inside the housing and on which a circuit board is mounted, a connection member which is disposed in the bracket and is electrically connected to the circuit board, and a conductive structure which is disposed in one portion of the connection member so as to be in contact with the button member, and which is electrically connected to the connection member and the button member, wherein the conductive structure comprises a contact portion in contact with the button member and a fixed portion which extends from the contact portion to the connection member so as to space the contact portion and the connection member apart from each other.

公开(公告)号：US20210000364A1

公开(公告)日：2021-01-07

申请号：US16860354

申请日：2020-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： June LEE ,  Junhui LEE ,  Yongyi KIM ,  Seunghyun CHO

IPC: A61B5/0404 ,  H05K1/18 ,  H01H13/52 ,  H01H13/14 ,  H01H13/04

Abstract: An electronic device is provided. The electronic device includes a housing, a printed circuit board disposed inside the housing and including a first face and a second face that faces away from the first face, a connection member disposed on the first face and electrically connected to the printed circuit board, a switch member disposed on the first face and at least partially overlaps the connection member when viewed from above the first face, and a button member including an electrically conductive member, and disposed to be capable of operating the switch member. The electrically conductive member is electrically connected to the connection member.

公开(公告)号：US20230335482A1

公开(公告)日：2023-10-19

申请号：US18108364

申请日：2023-02-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seunghyun CHO ,  Jaemin JUNG

IPC: H01L23/498 ,  H01L23/544 ,  H01L23/373 ,  H01L23/00

CPC classification number: H01L23/4985 ,  H01L23/544 ,  H01L23/3737 ,  H01L24/16 ,  H01L24/73 ,  H01L24/48 ,  H01L24/32 ,  H01L2223/54426 ,  H01L2224/16225 ,  H01L2224/73207 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/32245

Abstract: A film package includes a film substrate, a semiconductor chip disposed on the film substrate, a wiring pattern electrically connected to the semiconductor chip and including an input pattern and an output pattern, a protective layer disposed on the film substrate to cover at least a portion of the wiring pattern and having a first opening in which the semiconductor chip is disposed, and a second opening spaced apart from the first opening, a thermally conductive resin including a first resin disposed on the first opening to cover the semiconductor chip and a second resin disposed on the second opening, and a thermally conductive film disposed on the protective layer and having a first through-hole exposing a portion of the first resin, and a second through-hole exposing a portion of the second resin.

公开(公告)号：US20230049855A1

公开(公告)日：2023-02-16

申请号：US17718402

申请日：2022-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seunghyun CHO ,  Joonsik SOHN LEE ,  Chulhwan CHOO

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/48

Abstract: A semiconductor package includes a semiconductor package includes first, second, third and fourth semiconductor chips sequentially stacked on one another. Each of the first, second, third and fourth semiconductor chips includes a first group of bonding pads and a second group of bonding pads alternately arranged in a first direction and input/output (I/O) circuitry selectively connected to the first group of bonding pads respectively. Each of the first, second and third semiconductor chips includes a first group of through electrodes electrically connected to the first group of bonding pads and a second group of through electrodes electrically connected to the second group of bonding pads.

公开(公告)号：US20210240615A1

公开(公告)日：2021-08-05

申请号：US17003346

申请日：2020-08-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joonsik SOHN ,  Hyunjoong KIM ,  Woongjae SONG ,  Soowoong AHN ,  Seunghyun CHO ,  Jihyun CHOI

IPC: G06F12/06 ,  H01L23/48 ,  H01L25/065 ,  G11C8/00

Abstract: According to some example embodiments of the inventive concepts, there is provided a method of operating a stacked memory device including a plurality of memory dies stacked in a vertical direction, the method including receiving a command and an address from a memory controller, determining a stack ID indicating a subset of the plurality of memory dies by decoding the address, and accessing at least two memory dies among the subset of memory dies corresponding to the stack ID such that the at least two memory dies are non-adjacent.

公开(公告)号：US20190272885A1

公开(公告)日：2019-09-05

申请号：US16417834

申请日：2019-05-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwang-Ho KIM ,  Jihwan YU ,  Seunghyun CHO

IPC: G11C19/28 ,  G11C11/412 ,  G11C8/14 ,  H01L27/11578 ,  H01L27/11582 ,  H01L27/11575 ,  H01L27/11573 ,  H01L27/1157 ,  H01L27/11565

Abstract: Disclosed is a three-dimensional semiconductor device including a stack structure on a substrate and including electrodes that are vertically stacked on top of each other on a first region of a substrate, a vertical structure penetrating the stack structure and including a first semiconductor pattern, a data storage layer between the first semiconductor pattern and at least one of the electrodes, a transistor on a second region of the substrate, and a first contact coupled to the transistor. The first contact includes a first portion and a second portion on the first portion. Each of the first portion and the second portions has a diameter that increases with an increasing vertical distance from the substrate. A diameter of an upper part of the first portion is greater than a diameter of a lower part of the second portion.

公开(公告)号：US20240339376A1

公开(公告)日：2024-10-10

申请号：US18403864

申请日：2024-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seunghyun CHO ,  Eunho CHO

IPC: H01L23/373 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/373 ,  H01L21/481 ,  H01L23/4985 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L23/145 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204

Abstract: A chip on film package includes a flexible base film having a first surface and a second surface opposite to the first surface, the base film having a chip mounting region on the first surface; a plurality of wirings extending from the chip mounting region on the first surface of the base film in a first direction parallel to an extending direction of the base film; a semiconductor chip mounted on the chip mounting region on the first surface of the base film and electrically connected to the plurality of wirings; a heat dissipation layer provided to have a predetermined thickness in a depth direction from the second surface of the base film in an area overlapping the chip mounting region, the heat dissipation layer including a laser-induced carbon material; and an insulating layer covering the heat dissipation layer on the second surface of the base film.