公开(公告)号：US09318419B2

公开(公告)日：2016-04-19

申请号：US14532484

申请日：2014-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sok-Won Lee ,  Joon-Hee Lee ,  Jung-Dal Choi ,  Seong-Min Jo

IPC: H01L29/80 ,  H01L31/112 ,  H01L23/482 ,  H01L23/52 ,  H01L21/768 ,  H01L21/033 ,  H01L21/3213 ,  H01L21/764 ,  H01L27/115 ,  H01L23/522 ,  H01L23/532 ,  H01L23/528

CPC classification number: H01L23/4821 ,  H01L21/0337 ,  H01L21/32139 ,  H01L21/764 ,  H01L21/768 ,  H01L21/7682 ,  H01L21/76837 ,  H01L21/76838 ,  H01L21/76885 ,  H01L21/76895 ,  H01L23/4827 ,  H01L23/52 ,  H01L23/5222 ,  H01L23/528 ,  H01L23/53295 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/1157 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Conductive line structures, and methods of forming the same, include first and second pattern structures, insulation layer patterns and an insulating interlayer. The first pattern structure includes a conductive line pattern and a hard mask stacked, and extends in a first direction. The second pattern structure includes a second conductive line pattern and another hard mask stacked, and at least a portion of the pattern structure extends in the first direction. The insulation layer patterns contact end portions of the pattern structures. The first pattern structure and an insulation layer pattern form a closed curve shape in plan view, and the second pattern structure and another insulation layer pattern form another closed curve shape in plan view. The insulating interlayer covers upper portions of the pattern structures and the insulation layer patterns, an air gap between the pattern structures, and another air gap between the insulation layer patterns.

Abstract translation: 导电线结构及其形成方法包括第一和第二图案结构，绝缘层图案和绝缘夹层。 第一图案结构包括导线图案和硬掩模，并且沿第一方向延伸。 第二图案结构包括第二导电线图案和另一个硬掩模，并且图案结构的至少一部分沿第一方向延伸。 绝缘层图案接触图形结构的端部。 第一图案结构和绝缘层图案在平面图中形成闭合曲线形状，并且第二图案结构和另一绝缘层图案在平面图中形成另一封闭曲线形状。 绝缘中间层覆盖图案结构的上部和绝缘层图案，图案结构之间的空气间隙和绝缘层图案之间的另一气隙。

公开(公告)号：US10657274B2

公开(公告)日：2020-05-19

申请号：US15170132

申请日：2016-06-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyong-Ho Cho ,  Woo-Hyung Chun ,  Dong-Jin Park ,  Seong-Min Jo ,  Jin-Sung Yang

IPC: G06F21/00 ,  G06F21/62 ,  G06F3/06 ,  G06F12/14

Abstract: Provided are semiconductor devices. A semiconductor device includes processors performing an operation using data stored in a memory; and a memory protector dividing the memory into a first window area and a second window area. The first window area including a first fragment page, which is of a first size. The second window area including a second fragment page, which is of a second size, wherein the second size is smaller than the first size. The memory protector configured to protect the first fragment page and the second fragment page from being accessed by the processors.

公开(公告)号：US10068110B2

公开(公告)日：2018-09-04

申请号：US14674869

申请日：2015-03-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woo-Hyung Chun ,  Min-Je Jun ,  Sim-Ji Lee ,  Eui-Cheol Lim ,  Seong-Min Jo ,  Sung-Min Hong

IPC: G06F12/00 ,  G06F21/79 ,  G06F12/14 ,  G06F3/06

Abstract: A semiconductor device includes a first processing unit configured to perform a calculation by using data stored in a memory; and a memory path controller configured to communicate with the first processing unit and control the memory for the first processing unit to perform the calculation, wherein the memory path controller includes an address region control unit configured to divide an address space of the memory to include a secure address and a non-secure address and permit the first processing unit to access the secure address or the non-secure address, and a first content firewall unit connected with the address region control unit and configured to prevent the first processing unit from writing secure contents in the non-secure address.

公开(公告)号：US08884377B2

公开(公告)日：2014-11-11

申请号：US13769493

申请日：2013-02-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sok-Won Lee ,  Joon-Hee Lee ,  Jung-Dal Choi ,  Seong-Min Jo

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119 ,  H01L21/033 ,  H01L27/115 ,  H01L21/764 ,  H01L23/52 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/3213

CPC classification number: H01L23/4821 ,  H01L21/0337 ,  H01L21/32139 ,  H01L21/764 ,  H01L21/768 ,  H01L21/7682 ,  H01L21/76837 ,  H01L21/76838 ,  H01L21/76885 ,  H01L21/76895 ,  H01L23/4827 ,  H01L23/52 ,  H01L23/5222 ,  H01L23/528 ,  H01L23/53295 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/1157 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In one embodiment, first and second pattern structures respectively include first and second conductive line patterns and first and second hard masks sequentially stacked, and at least portions thereof extends in a first direction. The insulation layer patterns contact end portions of the first and second pattern structures. The first pattern structure and a first insulation layer pattern of the insulation layer patterns form a first closed curve shape in plan view, and the second pattern structure and a second insulation layer pattern of the insulation layer patterns form a second closed curve shape in plan view. The insulating interlayer covers upper portions of the first and second pattern structures and the insulation layer patterns, a first air gap between the first and second pattern structures, and a second air gap between the insulation layer patterns.

Abstract translation: 在一个实施例中，第一和第二图案结构分别包括第一和第二导线图案以及顺序堆叠的第一和第二硬掩模，并且其至少部分沿第一方向延伸。 绝缘层图案接触第一和第二图案结构的端部。 绝缘层图案的第一图案结构和第一绝缘层图案在平面图中形成第一闭合曲线形状，并且绝缘层图案的第二图案结构和第二绝缘层图案在平面图中形成第二闭合曲线形状 。 绝缘中间层覆盖第一和第二图案结构的上部和绝缘层图案，第一和第二图案结构之间的第一气隙，以及绝缘层图案之间的第二气隙。