公开(公告)号：US20240177768A1

公开(公告)日：2024-05-30

申请号：US18350416

申请日：2023-07-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungchul JUNG ,  Seok Ju YUN ,  Soon-Wan KWON

IPC: G11C11/412 ,  H03K19/20 ,  H03K19/21

CPC classification number: G11C11/412 ,  H03K19/20 ,  H03K19/215

Abstract: An apparatus includes a static random access memory (SRAM) cell including a first inverter and a second inverter, and a third inverter including a first inverter transistor and a second inverter transistor. An output terminal of the first inverter is connected to a source terminal of the second inverter transistor.

公开(公告)号：US20170201281A1

公开(公告)日：2017-07-13

申请号：US15214784

申请日：2016-07-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： SeongJoong KIM ,  Joonseong KANG ,  Seok Ju YUN ,  Young Jun HONG

IPC: H04B1/16 ,  H04B1/10 ,  H03L7/099

CPC classification number: H04B1/16 ,  H03J3/20 ,  H03J7/065 ,  H03J2200/40 ,  H03L7/0991 ,  H04B1/1027 ,  H04B2001/1072

Abstract: A frequency tuning apparatus includes: a frequency tuner configured to tune an oscillation frequency of an oscillator based on target information extracted from a mapping table in correspondence to a target frequency, and oscillation information collected from the oscillator; and a frequency compensator configured to compensate for a compensation error between the tuned oscillation frequency and the target frequency based on an offset table.

公开(公告)号：US20250013856A1

公开(公告)日：2025-01-09

申请号：US18640853

申请日：2024-04-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min Young MUN ,  Seok Ju YUN ,  Sei Joon KIM ,  Sang Joon KIM

IPC: G06N3/0464

Abstract: A convolutional neural network (CNN)-based analog in-sensor computing device may include a convolution layer including one or more convolution blocks configured to be used a predetermined number of times or more and perform a convolution operation, and an memory configured to temporarily store an output of the convolution layer and provide the stored analog output to a subsequent convolution layer.

公开(公告)号：US20240069867A1

公开(公告)日：2024-02-29

申请号：US18351039

申请日：2023-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok Ju YUN ,  Jaehyuk LEE ,  Seungchul JUNG ,  Soon-Wan KWON ,  Sungmeen MYUNG ,  Daekun YOON ,  Dong-Jin CHANG

IPC: G06F7/523 ,  G06F7/501 ,  G06F7/544 ,  G11C7/10

CPC classification number: G06F7/523 ,  G06F7/501 ,  G06F7/5443 ,  G11C7/109

Abstract: An apparatus and method with in-memory computing (IMC) are provided. An in-memory computing (IMC) circuit includes a plurality of memory banks, each memory bank including a bit cell configured to store a weight value and an operator configured to receive an input value, the operator being connected to the bit cell such that the operator upon receiving the input value outputs a logic operation result between the input value and the weight value, and a logic gate configured to receive the logic operation result of each of the memory banks.

公开(公告)号：US20210409072A1

公开(公告)日：2021-12-30

申请号：US17474100

申请日：2021-09-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok Ju YUN ,  Sang Joon KIM ,  Joonseong KANG

IPC: H04B5/00

Abstract: A wireless communication apparatus may include: an oscillator including a coil assembly exposed to an outside of the wireless communication apparatus, a variable capacitor, and a negative resistor; and a phase locking circuit connected to the coil assembly and the negative resistor. The phase locking circuit may be configured to generate a control signal to lock an oscillation frequency of the oscillator based on an oscillation signal generated by the oscillator, and provide the generated control signal to the variable capacitor.

公开(公告)号：US20190052492A1

公开(公告)日：2019-02-14

申请号：US16058263

申请日：2018-08-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok Ju YUN ,  Sang Joon KIM

IPC: H04L27/06 ,  H04B1/16

CPC classification number: H04L27/06 ,  H04B1/16

Abstract: A receiver includes an antenna configured to receive a radio signal, a pulse generator configured to generate a pulse, an oscillator configured to be driven based on the pulse to generate an oscillation signal based on the radio signal, and a measurer configured to be driven by the pulse to measure an oscillation degree of the oscillation signal, wherein the radio signal is received based on the oscillation degree of the oscillation signal.

公开(公告)号：US20180309406A1

公开(公告)日：2018-10-25

申请号：US15838971

申请日：2017-12-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seok Ju YUN

IPC: H03B5/12

CPC classification number: H04B1/0475 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/124 ,  H03F1/3211 ,  H03F3/45179 ,  H04B1/40

Abstract: A wireless communication apparatus includes an oscillator circuit configured to generate an oscillation signal corresponding to an oscillation frequency determined by an antenna, and a bias generator circuit configured to reconfigure an operation region mode of a transistor included in the oscillator circuit by adjusting a bias signal in response to an enable signal.

公开(公告)号：US20140240191A1

公开(公告)日：2014-08-28

申请号：US14186553

申请日：2014-02-21

Applicant: SNU R&DB FOUNDATION ,  SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Sup LEE ,  Seong Joong KIM ,  Seok Ju YUN ,  Sang Wook NAM ,  Su Min YUN

IPC: H01Q1/50

CPC classification number: H01Q13/18

Abstract: An antenna is described including a slot formed in a cavity, a substrate configured to cover a portion of the cavity and the slot, and a first port and a second port configured to supply power to the antenna using a first feeding line and a second feeding line. Each of the feeding line and the second feeding line is connected to the slot in a vertical direction and disposed to be separate from one another. A first input impedance of the antenna from the first port differs from a second input impedance of the antenna from the second port.

Abstract translation: 描述了一种天线，其包括形成在空腔中的槽，构造成覆盖腔和槽的一部分的衬底以及被配置为使用第一馈电线和第二馈电来向天线供电的第一端口和第二端口 线。 馈送线和第二馈电线中的每一根在垂直方向上连接到槽，并且彼此分离设置。 来自第一端口的天线的第一输入阻抗与天线的第二输入阻抗与第二端口不同。

公开(公告)号：US20240419628A1

公开(公告)日：2024-12-19

申请号：US18512788

申请日：2023-11-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyungwoo LEE ,  Soon-Wan KWON ,  Seok Ju YUN

IPC: G06F15/80 ,  G06F9/38

Abstract: Provided are a digital signal processor (DSP) and an electronic device using the same. The DSP includes: a first function unit (FU) having a non-IMC (in-memory computing) operation architecture using an operation unit; a second FU having an IMC architecture using a memory cell array; and a register file used by the first FU and the second FU.

公开(公告)号：US20240241694A1

公开(公告)日：2024-07-18

申请号：US18355046

申请日：2023-07-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Daekun YOON ,  Soon-Wan KWON ,  Seok Ju YUN ,  Jaehyuk LEE ,  Dong-Jin CHANG

IPC: G06F7/544 ,  G06F7/501 ,  G11C7/10

CPC classification number: G06F7/5443 ,  G06F7/501 ,  G11C7/1012

Abstract: Disclosed is an in-memory computing device and method. The in-memory computing device includes: a memory unit including bit cells configured to store first input data having a reference-bit-count, receive second input data also having the reference-bit-count, and perform a multiplication operation between the first input data and the second input data; and an operation unit including: a first adder tree configured to output intermediate operation results by adding results of performing the multiplication operation output with respect to each of the bit cells; a branch module configured to branch the intermediate operation results according to an operation mode of the in-memory computing device; and a second adder tree configured to output a final operation result based on an output of the branch module.