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公开(公告)号:US20230006040A1
公开(公告)日:2023-01-05
申请号:US17577088
申请日:2022-01-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangmoon LEE , Jinbum KIM , Hyojin KIM , Yongjun NAM , Sujin JUNG
IPC: H01L29/06 , H01L29/786 , H01L29/423
Abstract: An integrated circuit (IC) device includes a fin-type active region extending on a substrate in a first lateral direction. A gate line extends on the fin-type active region in a second lateral direction. The second lateral direction intersects the first lateral direction. A channel region is between the substrate and the gate line. A source/drain region is adjacent to the gate line on the fin-type active region and has a sidewall facing the channel region. A superlattice barrier is between the substrate and the channel region. The superlattice barrier is in contact with the source/drain region. The superlattice barrier has a structure in which a plurality of first sub-layers including a semiconductor layer doped with oxygen atoms and a plurality of second sub-layers including an undoped semiconductor layer are alternately stacked.
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公开(公告)号:US20240282830A1
公开(公告)日:2024-08-22
申请号:US18535421
申请日:2023-12-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Gyeom KIM , Jinbum KIM , Sangmoon LEE
IPC: H01L29/417 , H01L29/06 , H01L29/423 , H01L29/775 , H01L29/786
CPC classification number: H01L29/4175 , H01L29/0673 , H01L29/42392 , H01L29/775 , H01L29/78696
Abstract: A semiconductor device includes a substrate insulating layer; a gate structure extending in one direction on the substrate insulating layer; a source/drain region outside of the gate structure; and a backside contact plug below the source/drain region to have a second central axis offset from a first central axis of the source/drain region in a horizontal direction, and connected to the source/drain region, wherein the source/drain region includes a first epitaxial layer including a non-silicon element in a first concentration, and a second epitaxial layer on the first epitaxial layer and including a non-silicon element in a second concentration, higher than the first concentration, and at least a portion of an upper surface of the backside contact plug is in contact with the second epitaxial layer.
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公开(公告)号:US20230387307A1
公开(公告)日:2023-11-30
申请号:US18360457
申请日:2023-07-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sangmoon LEE , Kyungin CHOI , Seunghun LEE
IPC: H01L29/78 , H01L29/06 , H01L29/66 , H01L29/417
CPC classification number: H01L29/785 , H01L29/41791 , H01L29/6681 , H01L29/0649
Abstract: An active pattern structure includes a lower active pattern protruding from an upper surface of a substrate in a vertical direction substantially perpendicular to an upper surface of the substrate, a buffer structure on the lower active pattern, at least a portion of which may include aluminum silicon oxide, and an upper active pattern on the buffer structure.
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公开(公告)号:US20210375275A1
公开(公告)日:2021-12-02
申请号:US17405792
申请日:2021-08-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyundon YOON , Sangmoon LEE
Abstract: A first electronic device includes an audio outputter; a communicator configured to transmit data to and receive data from a second electronic device; a memory storing one or more instructions; and at least one processor configured to execute the one or more instructions to: obtain an audio output level of an audio that is output through the audio outputter; obtain a spacing distance between the second electronic device and the first electronic device; based on the obtained audio output level and the obtained spacing distance, obtain a voice reception notification indicating whether a voice can be accurately received by the second electronic device, and control the communicator to transmit the obtained voice reception notification to the second electronic device.
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公开(公告)号:US20240021704A1
公开(公告)日:2024-01-18
申请号:US18176170
申请日:2023-02-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangmoon LEE , Jinbum KIM , Dongwoo KIM , Hyojin KIM , Yongjun NAM , Ingeon HWANG
IPC: H01L29/66 , H01L29/786 , H01L29/06 , H01L21/8238 , H01L29/775 , H01L29/423 , H01L27/092
CPC classification number: H01L29/66545 , H01L29/78696 , H01L29/0673 , H01L21/823807 , H01L29/775 , H01L29/66439 , H01L29/42392 , H01L29/78687 , H01L27/092
Abstract: A semiconductor device includes a substrate including an active pattern, a channel pattern including a plurality of semiconductor patterns spaced apart from each other and vertically stacked, on the active pattern, a source/drain pattern connected to the plurality of semiconductor patterns, and a gate electrode including a first inner electrode provided below a first semiconductor pattern among the plurality of semiconductor patterns, on the plurality of semiconductor patterns, and a second inner electrode provided above the first semiconductor pattern, the first semiconductor pattern includes a first portion adjacent to the first inner electrode, a second portion adjacent to the second inner electrode, and a third portion between the first and second portions, the first semiconductor pattern includes a dopant having an atomic weight greater than that of silicon, and a dopant concentration of the third portion is smaller than a dopant concentration of each of the first and second portions.
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公开(公告)号:US20230246029A1
公开(公告)日:2023-08-03
申请号:US18133156
申请日:2023-04-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyojin KIM , Jihye LEE , Sangmoon LEE , Seung Hun LEE
IPC: H01L27/092 , H01L29/161
CPC classification number: H01L27/092 , H01L29/161
Abstract: A semiconductor device including a substrate; a first active pattern on the substrate and extending in a first direction, an upper portion of the first active pattern including a first channel pattern; first source/drain patterns in recesses in an upper portion of the first channel pattern; and a gate electrode on the first active pattern and extending in a second direction crossing the first direction, the gate electrode being on a top surface and on a side surface of the at least one first channel pattern, wherein each of the first source/drain patterns includes a first, second, and third semiconductor layer, which are sequentially provided in the recesses, each of the first channel pattern and the third semiconductor layers includes silicon-germanium (SiGe), and the first semiconductor layer has a germanium concentration higher than those of the first channel pattern and the second semiconductor layer.
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公开(公告)号:US20210143271A1
公开(公告)日:2021-05-13
申请号:US16887900
申请日:2020-05-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sangmoon LEE , Kyungin CHOI , Seunghun LEE
IPC: H01L29/78 , H01L29/417 , H01L29/66 , H01L29/06
Abstract: An active pattern structure includes a lower active pattern protruding from an upper surface of a substrate in a vertical direction substantially perpendicular to an upper surface of the substrate, a buffer structure on the lower active pattern, at least a portion of which may include aluminum silicon oxide, and an upper active pattern on the buffer structure.
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公开(公告)号:US20190166419A1
公开(公告)日:2019-05-30
申请号:US16202911
申请日:2018-11-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sangchul KO , Sangmoon LEE , Byeonggeun CHEON , Dongkyu PARK , Donghyun JUNG
Abstract: An apparatus for outputting an audio signal includes: a channel processor configured to generate two or more channel signals from audio data; a signal processor configured to render the generated two or more channel signals; and a directional speaker configured to reproduced a rendered channel signal as an audible sound. The signal processor may include a frequency converter configured to generate a channel signal of a frequency domain by converting the generated two or more channel signals through frequency conversion, and a re-panner configured to change a channel gain of at least one of the generated channel signals by as much as an adjustment value for the channel gain, wherein the adjustment value is monotonically changed as a frequency of the channel signal of the frequency domain increases.
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公开(公告)号:US20190081160A1
公开(公告)日:2019-03-14
申请号:US15956166
申请日:2018-04-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dong Chan SUH , Sangmoon LEE , Yihwan KIM , Woo Bin SONG , Dongsuk SHIN , Seung Ryul LEE
Abstract: A method for manufacturing a semiconductor device and a semiconductor device, the method including forming an active pattern on a substrate such that the active pattern includes sacrificial patterns and semiconductor patterns alternately and repeatedly stacked on the substrate; and forming first spacer patterns at both sides of each of the sacrificial patterns by performing an oxidation process, wherein the first spacer patterns correspond to oxidized portions of each of the sacrificial patterns, wherein the sacrificial patterns include a first semiconductor material containing impurities, wherein the semiconductor patterns include a second semiconductor material different from the first semiconductor material, and wherein the impurities include an element different from semiconductor elements of the first semiconductor material and the second semiconductor material.
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公开(公告)号:US20240222467A1
公开(公告)日:2024-07-04
申请号:US18243251
申请日:2023-09-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jieun YUN , Sunhye HWANG , Gyeom KIM , Ji Young PARK , Sangmoon LEE
IPC: H01L29/66 , H01L21/02 , H01L29/06 , H01L29/08 , H01L29/161 , H01L29/423 , H01L29/775
CPC classification number: H01L29/66439 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L29/0673 , H01L29/0847 , H01L29/161 , H01L29/42392 , H01L29/66545 , H01L29/66553 , H01L29/775
Abstract: A method of manufacturing an integrated circuit device, the method including forming a structure on a substrate, a semiconductor film and an insulating film being exposed in the structure, and selectively forming a silicon germanium layer only on the semiconductor film by using a process gas, the process gas including a disilane compound having at least two chlorine atoms, a germanium element-containing gas, and hydrogen gas.
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