公开(公告)号：US20200185383A1

公开(公告)日：2020-06-11

申请号：US16418366

申请日：2019-05-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Woo KIM ,  Choelhwyi BAE ,  Yang Gyeom KIM ,  Sung Eun KIM ,  Sang Woo PAE ,  Hyun Chul SAGONG

IPC: H01L27/092 ,  H01L27/11 ,  H01L29/40 ,  H01L29/49 ,  H01L21/28 ,  H01L21/765 ,  H01L21/8238

Abstract: A semiconductor device includes a first fin that protrudes from a substrate and extends in a first direction, a second fin that protrudes from the substrate and extends in the first direction, the first fin and the second fin being spaced apart, a gate line including a dummy gate electrode and a gate electrode, the dummy gate electrode at least partially covering the first fin, the gate electrode at least partially covering the second fin, the dummy gate electrode including different materials from the gate electrode, the gate line covering the first fin and the second fin, the gate line extending in a second direction different from the first direction, and a gate dielectric layer between the gate electrode and the second fin.

公开(公告)号：US20230029151A1

公开(公告)日：2023-01-26

申请号：US17591144

申请日：2022-02-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyung Gyun NOH ,  Keun-Ho RHEW ,  Sang Woo PAE ,  Jin Soo BAE ,  Deok-Seon CHOI ,  Il-Joo CHOI

IPC: H01L23/498 ,  H01L23/532 ,  H01L23/14

Abstract: The present disclosure provides a semiconductor package capable of improving performance and reliability. The semiconductor package of the present disclosure includes a first device and a second device that are electrically connected to each other, the first device includes a substrate, a first pad formed on an upper side of the substrate, and a passivation film formed on the upper side of the substrate and formed to surround the first pad, the second device includes a second pad placed to face the first pad, and the first pad has a center pad having a first elastic modulus and an edge pad having a second elastic modulus smaller than the first elastic modulus, the edge pad formed to surround the center pad and to contact the passivation film.

公开(公告)号：US20190326187A1

公开(公告)日：2019-10-24

申请号：US16191881

申请日：2018-11-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun Chul SAGONG ,  June Kyun PARK ,  Hyun Jin KIM ,  Ki Hyun CHOI ,  Sang Woo PAE

IPC: H01L21/66 ,  H01L27/11 ,  H01L27/088

Abstract: A semiconductor device including a test structure includes a semiconductor substrate and a plurality of test structures on the semiconductor substrate. The test structures include respective lower active regions extending from the semiconductor substrate in a vertical direction and having different widths, and upper active regions extending from respective lower active regions in the vertical direction. Each of the lower active regions includes first regions and second regions. The first regions overlap the upper active regions and are between the second regions, and the second regions include outer regions and inner regions between the outer regions. The outer regions, located in the lower active regions having different widths, have different widths.

公开(公告)号：US20200035675A1

公开(公告)日：2020-01-30

申请号：US16395841

申请日：2019-04-26

Applicant: SAMSUNG ELECTRONICS CO, LTD

Inventor： HYUN CHUL SAGONG ,  Sang Woo PAE ,  Ki Hyun CHOI ,  June Kyun PARK ,  Uk Jin JUNG

IPC: H01L27/088 ,  H01L21/28 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78

Abstract: A semiconductor device is provided. The Semiconductor device includes a substrate, a first fin type pattern and a second fin type pattern which protrude from an upper surface of the substrate and are spaced apart from each other, a first semiconductor pattern on the first fin type pattern, a second semiconductor pattern on the second tin type pattern and a blocking pattern between the first semiconductor pattern and the second semiconductor pattern, a part of the first semiconductor pattern being inserted in the blocking pattern.