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    METHODS AND SYSTEM FOR EFFICIENT ACCESS TO SOLID STATE DRIVE
    1.
    发明公开
    METHODS AND SYSTEM FOR EFFICIENT ACCESS TO SOLID STATE DRIVE 审中-公开

    公开(公告)号：US20240134801A1

    公开(公告)日：2024-04-25

    申请号：US18080211

    申请日：2022-12-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Marie Mai NGUYEN ,  Rekha PITCHUMANI ,  Yang Seok KI

    IPC: G06F12/0882 ,  G06F12/02 ,  G06F12/0891

    CPC classification number: G06F12/0882 ,  G06F12/0246 ,  G06F12/0891

    Abstract: Methods and memory devices are provided. A request is received from a host device at a memory device in a first state. In case that the request is a read request, first data is read from a cache of the memory device based on the read request, and the first data is output to the host device. The cache is loaded with data with the memory device in a second state. In case that the request is a write request, a block of the cache is modified to remove cache data, the cache data and corresponding data from the cache are written to a flash memory of the memory device, and second data is written to the block of the cache based on the received write request.

    SYSTEMS AND METHODS FOR COMPUTATIONAL ACCELERATION
    3.
    发明公开
    SYSTEMS AND METHODS FOR COMPUTATIONAL ACCELERATION 审中-公开

    公开(公告)号：US20240152466A1

    公开(公告)日：2024-05-09

    申请号：US18092925

    申请日：2023-01-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Marie Mai NGUYEN ,  Rekha PITCHUMANI ,  Zongwang LI ,  Yang Seok KI

    IPC: G06F12/109

    CPC classification number: G06F12/109 ,  G06F2212/1041

    Abstract: A system is described. The system may include a host processor, a host memory connected to the host processor, and a storage device connected to the host processor. An accelerator may communicate with the host processor. The accelerator may produce an output. The accelerator may also include a local memory, which may include a first region and a second region. The first region of the local memory of the accelerator may support a first mode, and the second region of the local memory of the accelerator may support a second mode. The accelerator may store the output of the accelerator in a destination, which may include the host memory, the storage device, the first region of the local memory of the accelerator, or the second region of the local memory of the accelerator.

    SYSTEMS, METHODS, AND APPARATUS FOR TRANSFERRING DATA BETWEEN INTERCONNECTED DEVICES
    4.
    发明申请
    SYSTEMS, METHODS, AND APPARATUS FOR TRANSFERRING DATA BETWEEN INTERCONNECTED DEVICES 有权

    公开(公告)号：US20230057633A1

    公开(公告)日：2023-02-23

    申请号：US17496759

    申请日：2021-10-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Marie Mai NGUYEN ,  Rekha PITCHUMANI ,  Heekwon PARK ,  Yang Seok KI

    IPC: G06F13/16

    Abstract: A method for transferring data may include writing, from a producing device, data to a storage device through an interconnect, determining a consumer device for the data, prefetching the data from the storage device, and transferring, based on the determining, the data to the consumer device through the interconnect. The method may further comprise receiving, at a prefetcher for the storage device, an indication of a relationship between the producing device and the consumer device, and determining the consumer device based on the indication. The method may further comprise placing the data in a stream at the storage device based on the relationship between the producing device and the consumer device. The indication may be provided by an application associated with the consumer device. Receiving the indication may include receiving the indication through a coherent memory protocol for the interconnect.

    SYSTEMS, METHODS, AND DEVICES FOR BIAS MODE MANAGEMENT IN MEMORY SYSTEMS
    6.
    发明申请
    SYSTEMS, METHODS, AND DEVICES FOR BIAS MODE MANAGEMENT IN MEMORY SYSTEMS 有权

    公开(公告)号：US20220405207A1

    公开(公告)日：2022-12-22

    申请号：US17500927

    申请日：2021-10-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Armin HAJ ABOUTALEBI ,  Rekha PITCHUMANI ,  Zongwang LI ,  Marie Mai NGUYEN

    IPC: G06F12/0882 ,  G06F12/02 ,  G06F13/16 ,  G06K9/62 ,  G06N20/00

    Abstract: A method for managing a memory system may include monitoring one or more accesses of a page of memory, determining, based on the monitoring, an access pattern of the page of memory, and selecting, based on the access pattern, a coherency bias for the page of memory. The monitoring may include maintaining an indication of the one or more accesses. The determining may include comparing the indication to a threshold. Maintaining the indication may include changing the indication in a first manner based on an access of the page of memory by a first apparatus. Maintaining the indication may include changing the indication in a second manner based on an access of the page of memory by a second apparatus. The first manner may counteract the second manner.

    SYSTEMS, METHODS, AND APPARATUS FOR DEVICES WITH MEMORY AND STORAGE CONFIGURATIONS
    8.
    发明公开
    SYSTEMS, METHODS, AND APPARATUS FOR DEVICES WITH MEMORY AND STORAGE CONFIGURATIONS 审中-公开

    公开(公告)号：US20240361952A1

    公开(公告)日：2024-10-31

    申请号：US18427816

    申请日：2024-01-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Rekha PITCHUMANI ,  Yang Seok KI ,  Zongwang LI ,  Marie Mai NGUYEN ,  Tong ZHANG

    IPC: G06F3/06

    CPC classification number: G06F3/0656 ,  G06F3/0604 ,  G06F3/0679

    Abstract: A device may include cache media, storage media, a communication interface configured to communicate with the cache media and the storage media, and at least one control circuit to configure a portion of the storage media as visible memory, and configure a portion of the cache media as a cache for the portion of the storage media. The portion of the storage media may be a first portion of the storage media, and the at least one control circuit may be to configure a second portion of the storage media to persist the portion of the cache media. The portion of the storage media may be a first portion of the storage media, and the at least one control circuit may be to configure a second portion of the storage media as visible storage.

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