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公开(公告)号：US20240361952A1
公开(公告)日：2024-10-31
申请号：US18427816
申请日：2024-01-30
发明人： Rekha PITCHUMANI , Yang Seok KI , Zongwang LI , Marie Mai NGUYEN , Tong ZHANG
IPC分类号： G06F3/06
CPC分类号： G06F3/0656 , G06F3/0604 , G06F3/0679
摘要： A device may include cache media, storage media, a communication interface configured to communicate with the cache media and the storage media, and at least one control circuit to configure a portion of the storage media as visible memory, and configure a portion of the cache media as a cache for the portion of the storage media. The portion of the storage media may be a first portion of the storage media, and the at least one control circuit may be to configure a second portion of the storage media to persist the portion of the cache media. The portion of the storage media may be a first portion of the storage media, and the at least one control circuit may be to configure a second portion of the storage media as visible storage.
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2.发明公开公开(公告)号：US20240338315A1
公开(公告)日：2024-10-10
申请号：US18627438
申请日：2024-04-04
发明人： Changho CHOI , Yang Seok KI
IPC分类号： G06F12/0831 , G06F9/50
CPC分类号： G06F12/0831 , G06F9/5016
摘要： A method may include receiving, at a computational device, a command, wherein the computational device may include at least one computational resource, performing, using the at least one computational resource, based on the command, a computational operation, wherein the computational operation may generate a result, and sending, from the computational device, using a protocol of a communication interface, the result, wherein the communication interface may be configured to modify a copy of data stored at a first location based on modifying the data stored at a second location. The protocol may include a memory access protocol, and the sending the result may be performed using the memory access protocol. The protocol may include a cache protocol, and the sending the result may be performed using the cache protocol.
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公开(公告)号：US20240201909A1
公开(公告)日：2024-06-20
申请号：US18587929
申请日：2024-02-26
IPC分类号： G06F3/06
CPC分类号： G06F3/0664 , G06F3/0604 , G06F3/0679
摘要： A device may include an interconnect interface, a memory system including one or more first type memory devices to receive first data, one or more second type memory devices to receive second data, and an accelerator configured to perform an operation using the first data and the second data. The memory system may further include a cache configured to cache the second data for the one or more second type memory devices. A device may include an interconnect interface, a memory system coupled to the interconnect interface to receive data, an accelerator coupled to the memory system, and virtualization logic configured to partition one or more resources of the accelerator into one or more virtual accelerators, wherein a first one of the one or more virtual accelerators may be configured to perform a first operation on a first portion of the data.
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公开(公告)号：US20230409480A1
公开(公告)日：2023-12-21
申请号：US17885519
申请日：2022-08-10
发明人： Tong ZHANG , Heekwon PARK , Rekha PITCHUMANI , Yang Seok KI
IPC分类号： G06F12/0817 , G06F3/06
CPC分类号： G06F12/0828 , G06F3/0689 , G06F3/0655 , G06F3/0604 , G06F2212/621
摘要： A system is disclosed. A first storage device may supporting a cache coherent interconnect protocol, the cache coherent interconnect protocol including a block level protocol and a byte level protocol. A second storage device may also support the cache coherent interconnect protocol. A redundant array of independent disks (RAID) circuit may communicate with the first storage device and the second storage device. The RAID circuit may apply a RAID level to the first storage device and the second storage device. The RAID circuit may be configured to receive a request using the byte level protocol and to access data on the first storage device.
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公开(公告)号：US20230305751A1
公开(公告)日：2023-09-28
申请号：US18198256
申请日：2023-05-16
发明人： Yang Seok KI , Rekha PITCHUMANI
CPC分类号： G06F3/0659 , G06F3/0619 , G06F3/0673 , G06F11/1068
摘要： A Solid State Drive (SSD) is disclosed. The SSD may include an interface to receive read and write requests from an application on a host. Storage, including at least one chip, may store data. An SSD controller may process the read and write requests from the application. A configuration module may configure the SSD. Storage may include a reliability table which may include entries specifying configurations of the SSD and reliabilities for those configurations.
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公开(公告)号：US20230297517A1
公开(公告)日：2023-09-21
申请号：US18123252
申请日：2023-03-17
发明人： Marie Mai NGUYEN , Heekwon PARK , Tong ZHANG , Ho Bin LEE , Yang Seok KI , Rekha PITCHUMANI
CPC分类号： G06F12/1491 , G06F12/0269 , G06F2212/1052
摘要： A method includes storing, at a computing device, access granularity criteria associated with a memory area. The method further includes receiving a memory operation request requesting access to a first portion of the memory area at the first access granularity. The method further includes in response to the memory operation request satisfying the access granularity criteria, sending, from the computing device, a command to a storage device based on the memory operation request.
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公开(公告)号：US20230050808A1
公开(公告)日：2023-02-16
申请号：US17494823
申请日：2021-10-05
发明人： Zongwang LI , Tong ZHANG , Rekha PITCHUMANI , Yang Seok KI
摘要： A method for memory access may include receiving, at a device, a first memory access request for a parallel workload, receiving, at the device, a second memory access request for the parallel workload, processing, by a first logical device of the device, the first memory access request, and processing, by a second logical device of the device, the second memory access request. Processing the first memory access request and processing the second memory access request may include parallel processing the first and second memory access requests. The first logical device may include one or more first resources. The method may further include configuring the first logical device based on one or more first parameters of the parallel workload. The method may further include allocating one or more first resources to the first logical device based on at least one of the one or more first parameters of the parallel workload.
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公开(公告)号：US20230017019A1
公开(公告)日：2023-01-19
申请号：US17507775
申请日：2021-10-21
发明人： Heekwon PARK , Tong ZHANG , Yang Seok KI
IPC分类号： G06F3/06
摘要： A method may include receiving, from a process, a memory allocation request for a memory system comprising a first channel having a first channel utilization and a second channel having a second channel utilization, selecting, based on the first channel utilization and the second channel utilization, the first channel, and allocating, to the process, a page of memory from the first channel. The selecting may include selecting the first channel based on a balanced random policy. The selecting may include generating a ticket based on a random number and a number of free pages, comparing the ticket to a number of free pages of the first channel, and selecting the first channel based on the comparing. The selecting may include selecting the first channel based on a least used channel policy.
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公开(公告)号：US20220060195A1
公开(公告)日：2022-02-24
申请号：US17518581
申请日：2021-11-03
发明人： Yang Seok KI , Ho Bin LEE
摘要： A storage device is disclosed. The storage device may comprise storage for input encoded data. A controller may process read requests and write requests from a host computer on the data in the storage. An in-storage compute controller may receive a predicate from the host computer to be applied to the input encoded data. A transcoder may include an index mapper to map an input dictionary to an output dictionary, with one entry in the input dictionary mapped to an entry in the output dictionary, and another entry in the input dictionary mapped to a “don't care” entry in the output dictionary.
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公开(公告)号：US20210405926A1
公开(公告)日：2021-12-30
申请号：US16985145
申请日：2020-08-04
发明人： Rekha PITCHUMANI , Yang Seok KI
摘要： A message queue storage device includes: a non-volatile flash memory unit including one or more flash memory dies including one or more pages grouped into one or more flash blocks; a volatile memory; a data port; and a storage controller configured to: receive, via the data port, a message write command including a message and a queue identifier; identify a queue from one or more queues based on the queue identifier; determine that the message is a persistent message; select a write physical location in one or more pages of the flash memory dies in which to store the message; and store the message associated with the queue at the write physical location in the one or more pages of the non-volatile flash memory unit.
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