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    SYSTEMS, METHODS, AND APPARATUS FOR MEMORY LOADING IN A STORAGE DEVICE
    1.
    发明申请
    SYSTEMS, METHODS, AND APPARATUS FOR MEMORY LOADING IN A STORAGE DEVICE 有权

    公开(公告)号：US20250123968A1

    公开(公告)日：2025-04-17

    申请号：US18803749

    申请日：2024-08-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Zongwang LI ,  Shuyi PEI ,  Tong ZHANG ,  Rekha PITCHUMANI ,  Yang Seok KI

    IPC: G06F12/0862

    Abstract: A device may include memory media; storage media; a buffer; and at least one circuit configured to perform one or more operations including receiving memory address information; storing the memory address information in the buffer; determining that data may be loaded to the memory media; and loading data to the memory media, from the storage media, corresponding to the memory address information in the buffer. In some aspects, the memory address information is first memory address information; the data is first data; and the at least one circuit is further configured to perform one or more operations including receiving a memory access request including second memory address information; determining to load second data based on the memory access request; and loading the second data to the memory media, from the storage media, based on the second memory address information.

    SYSTEMS AND METHODS FOR BUFFER DATA PRESERVATION
    2.
    发明申请
    SYSTEMS AND METHODS FOR BUFFER DATA PRESERVATION 有权

    公开(公告)号：US20250077092A1

    公开(公告)日：2025-03-06

    申请号：US18511907

    申请日：2023-11-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Byung CHOI ,  Tong ZHANG ,  Changho CHOI

    IPC: G06F3/06

    Abstract: Systems and methods for buffer data preservation. In some embodiments, the method includes: receiving, by a persistent storage device including non-volatile memory and a buffer storing data, a first memory-addressed instruction; and copying a portion of the data in the buffer of the persistent storage device to the non-volatile memory, based on receiving the first memory-addressed instruction.

    SYSTEMS AND METHODS FOR A REDUNDANT ARRAY OF INDEPENDENT DISKS (RAID) USING A DECODER IN CACHE COHERENT INTERCONNECT STORAGE DEVICES
    4.
    发明公开
    SYSTEMS AND METHODS FOR A REDUNDANT ARRAY OF INDEPENDENT DISKS (RAID) USING A DECODER IN CACHE COHERENT INTERCONNECT STORAGE DEVICES 审中-公开

    公开(公告)号：US20230409196A1

    公开(公告)日：2023-12-21

    申请号：US17885520

    申请日：2022-08-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Tong ZHANG ,  Heekwon PARK ,  Rekha PITCHUMANI ,  Yang Seok KI

    IPC: G06F3/06

    CPC classification number: G06F3/0604 ,  G06F3/064 ,  G06F3/0689

    Abstract: A system is disclosed. The system may include a processor that may issue a byte level protocol request including a byte address. The system may also include a first storage device and a second storage device. The first storage device and the second storage device may support a cache coherent interconnect protocol, the cache coherent interconnect protocol including a block level protocol and a byte level protocol. The first storage device and the second storage device are included in a redundant array of independent disks (RAID). The first storage device may include a first address range, and the second storage device may include a second address range. The second storage device may provide a RAID address range associated with the first address range and the second address range. A decoder associated with the second storage device may be configured to receive the request from the processor. The decoder may determine that the byte address in the RAID address range is associated with a target address range.

    SYSTEMS, METHODS, AND APPARATUS FOR COORDINATING COMPUTATION SYSTEMS
    5.
    发明申请
    SYSTEMS, METHODS, AND APPARATUS FOR COORDINATING COMPUTATION SYSTEMS 有权

    公开(公告)号：US20220374260A1

    公开(公告)日：2022-11-24

    申请号：US17686404

    申请日：2022-03-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Tong ZHANG ,  Jing YANG ,  Rekha PITCHUMANI

    IPC: G06F9/48 ,  G06F9/54 ,  G06F9/455

    Abstract: A method for computation may include performing a first computation using a first system, wherein the first computation may be based, at least in part, on a first computation basis, performing a second computation using a second system, wherein the second computation may be based, at least in part, on a second computation basis, and coordinating the first computation and the second computation. The first computation basis may include a clock basis, and the second computation basis may include an event basis. The first computation may include a first operation, the second computation may include a second operation, and the coordinating the first computation and the second computation may include coordinating the first computation and the second computation based on the first operation and the second operation. The first operation may include an application computation operation, and the second operation may include a device computation operation.

    SYSTEMS, METHODS, AND APPARATUS FOR DEVICES WITH MEMORY AND STORAGE CONFIGURATIONS
    6.
    发明公开
    SYSTEMS, METHODS, AND APPARATUS FOR DEVICES WITH MEMORY AND STORAGE CONFIGURATIONS 审中-公开

    公开(公告)号：US20240361952A1

    公开(公告)日：2024-10-31

    申请号：US18427816

    申请日：2024-01-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Rekha PITCHUMANI ,  Yang Seok KI ,  Zongwang LI ,  Marie Mai NGUYEN ,  Tong ZHANG

    IPC: G06F3/06

    CPC classification number: G06F3/0656 ,  G06F3/0604 ,  G06F3/0679

    Abstract: A device may include cache media, storage media, a communication interface configured to communicate with the cache media and the storage media, and at least one control circuit to configure a portion of the storage media as visible memory, and configure a portion of the cache media as a cache for the portion of the storage media. The portion of the storage media may be a first portion of the storage media, and the at least one control circuit may be to configure a second portion of the storage media to persist the portion of the cache media. The portion of the storage media may be a first portion of the storage media, and the at least one control circuit may be to configure a second portion of the storage media as visible storage.

    SYSTEMS, METHODS, AND APPARATUS FOR MEMORY ACCESS IN STORAGE DEVICES
    10.
    发明申请
    SYSTEMS, METHODS, AND APPARATUS FOR MEMORY ACCESS IN STORAGE DEVICES 有权

    公开(公告)号：US20230050808A1

    公开(公告)日：2023-02-16

    申请号：US17494823

    申请日：2021-10-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Zongwang LI ,  Tong ZHANG ,  Rekha PITCHUMANI ,  Yang Seok KI

    IPC: G06F3/06 ,  G06F13/16 ,  G06F9/54

    Abstract: A method for memory access may include receiving, at a device, a first memory access request for a parallel workload, receiving, at the device, a second memory access request for the parallel workload, processing, by a first logical device of the device, the first memory access request, and processing, by a second logical device of the device, the second memory access request. Processing the first memory access request and processing the second memory access request may include parallel processing the first and second memory access requests. The first logical device may include one or more first resources. The method may further include configuring the first logical device based on one or more first parameters of the parallel workload. The method may further include allocating one or more first resources to the first logical device based on at least one of the one or more first parameters of the parallel workload.

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