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公开(公告)号:US20240134796A1
公开(公告)日:2024-04-25
申请号:US18163208
申请日:2023-02-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Shuyi PEI , Jing YANG , Rekha PITCHUMANI
IPC: G06F12/0831 , G06F12/0888 , G06F12/0891
CPC classification number: G06F12/0833 , G06F12/0888 , G06F12/0891
Abstract: Systems and methods for persistent storage with a dual interface. In some embodiments, a persistent storage device includes: a processing circuit; a cache; and persistent storage. The processing circuit may be configured to perform a method, the method including: receiving a first write request according to a first protocol; saving a data payload of the first write request in a first portion of the cache; receiving a second write request according to a second protocol; and saving a data payload of the second write request in a second portion of the cache.
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公开(公告)号:US20250123968A1
公开(公告)日:2025-04-17
申请号:US18803749
申请日:2024-08-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Zongwang LI , Shuyi PEI , Tong ZHANG , Rekha PITCHUMANI , Yang Seok KI
IPC: G06F12/0862
Abstract: A device may include memory media; storage media; a buffer; and at least one circuit configured to perform one or more operations including receiving memory address information; storing the memory address information in the buffer; determining that data may be loaded to the memory media; and loading data to the memory media, from the storage media, corresponding to the memory address information in the buffer. In some aspects, the memory address information is first memory address information; the data is first data; and the at least one circuit is further configured to perform one or more operations including receiving a memory access request including second memory address information; determining to load second data based on the memory access request; and loading the second data to the memory media, from the storage media, based on the second memory address information.
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公开(公告)号:US20240061786A1
公开(公告)日:2024-02-22
申请号:US17986889
申请日:2022-11-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Da ZHANG , Jing YANG , Tong ZHANG , Shuyi PEI , Rekha PITCHUMANI
IPC: G06F12/0891 , G06F12/0804
CPC classification number: G06F12/0891 , G06F12/0804 , G06F2212/1024
Abstract: An apparatus may include at least one memory, and at least one processor configured to determine an accessibility of a first version of a page, wherein the first version of the page may be stored in the at least one memory, and perform, based on the accessibility of the first version of the page, an access of at least a portion of a second version of the page, wherein the second version of the page is stored in the at least one memory. The accessibility of the first version of the page may be based on an erase operation of the first version of the page. The access of the at least a portion of the second version of the page may include an access of a cache line of the second version of the page.
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公开(公告)号:US20230393906A1
公开(公告)日:2023-12-07
申请号:US17882124
申请日:2022-08-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jing YANG , Shuyi PEI , Jingpei YANG , Rekha PITCHUMANI
IPC: G06F9/50
CPC classification number: G06F9/5083 , G06F9/505 , G06F9/5077
Abstract: A method and a memory device are provided. One or more host central processing units (HCPUs) of the memory device may receive a workload from a host application. The workload includes an identifier (ID). The workload may be distributed to a central processing unit (CPU) of the memory device based on the ID. The workload may be distributed to channels of the memory device based on the CPU.
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