公开(公告)号：US09679874B2

公开(公告)日：2017-06-13

申请号：US14938788

申请日：2015-11-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Kwon Bae ,  Jae Choon Kim ,  Jichul Kim ,  Kyol Park ,  Chajea Jo

IPC: H01L23/31 ,  H01L23/498 ,  H01L23/367 ,  H01L25/065 ,  H01L23/00 ,  H01L23/36 ,  H01L23/538

CPC classification number: H01L25/0657 ,  H01L23/36 ,  H01L23/367 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5385 ,  H01L24/00 ,  H01L24/29 ,  H01L24/32 ,  H01L25/0655 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/29011 ,  H01L2224/3205 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06589 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate, a first semiconductor package disposed on the substrate, and a second semiconductor package spaced apart from the first semiconductor package on the substrate. The second semiconductor package includes a semiconductor chip stacked on the substrate, an adhesion part covering the semiconductor chip, and a heat-blocking structure disposed between the substrate and the semiconductor chip. Heat generated from the first semiconductor package and transmitted to the second semiconductor package through the substrate is blocked by the heat-blocking structure.

公开(公告)号：US20140254092A1

公开(公告)日：2014-09-11

申请号：US14104435

申请日：2013-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Hyeok Im ,  Kyol Park ,  Hee-Jung Hwang

IPC: H01L23/34

CPC classification number: H01L23/34 ,  H01L23/145 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/49827 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A semiconductor package and an electronic system including the same include a package board having an electric circuit pattern. A semiconductor chip is mounted on the package board and electrically connected with the circuit pattern of the package board. A non-contact temperature detector is provided with the semiconductor package and detects a temperature of an external heat source without making contact with the external heat source. A temperature controller controls the semiconductor chip according to the temperature of the external heat source that is detected by the non-contact temperature detector.

Abstract translation: 包括该半导体封装的电子系统包括具有电路图案的封装板。 半导体芯片安装在封装板上并与封装板的电路图形电连接。 非接触式温度检测器设置有半导体封装，并且在不与外部热源接触的情况下检测外部热源的温度。 温度控制器根据由非接触式温度检测器检测到的外部热源的温度来控制半导体芯片。

公开(公告)号：US09190338B2

公开(公告)日：2015-11-17

申请号：US14188917

申请日：2014-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyol Park ,  Yunhyeok Im ,  Eon Soo Jang

IPC: H01L23/34 ,  H01L23/16 ,  H01L23/31 ,  H01L23/427 ,  H01L23/433 ,  H01L25/065 ,  H01L23/38

CPC classification number: H01L23/16 ,  H01L23/3128 ,  H01L23/38 ,  H01L23/4275 ,  H01L23/4334 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A semiconductor package includes a substrate. A lower semiconductor chip is disposed above the substrate. An upper semiconductor chip is disposed on the lower semiconductor chip. A top surface of the lower semiconductor chip at an end of the lower semiconductor chip is exposed. A heat slug disposed above the upper semiconductor chip. A molding layer is disposed between the substrate and the heat slug. The molding layer is configured to seal the lower semiconductor chip and the upper semiconductor chip. An upper spacer is disposed between the lower semiconductor chip and the heat slug. The upper spacer is disposed on the exposed surface of the lower semiconductor chip.

Abstract translation: 半导体封装包括衬底。 下半导体芯片设置在基板上方。 上半导体芯片设置在下半导体芯片上。 在下半导体芯片的一端的下半导体芯片的顶表面被暴露。 设置在上半导体芯片上方的散热片。 模制层设置在基板和热块之间。 模制层被配置为密封下半导体芯片和上半导体芯片。 上部间隔件设置在下部半导体芯片和热塞之间。 上隔板设置在下半导体芯片的暴露表面上。

公开(公告)号：US20140353813A1

公开(公告)日：2014-12-04

申请号：US14188917

申请日：2014-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyol Park ,  Yunhyeok Im ,  Eon Soo Jang

IPC: H01L23/34

CPC classification number: H01L23/16 ,  H01L23/3128 ,  H01L23/38 ,  H01L23/4275 ,  H01L23/4334 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A semiconductor package includes a substrate. A lower semiconductor chip is disposed above the substrate. An upper semiconductor chip is disposed on the lower semiconductor chip. A top surface of the lower semiconductor chip at an end of the lower semiconductor chip is exposed. A heat slug disposed above the upper semiconductor chip. A molding layer is disposed between the substrate and the heat slug. The molding layer is configured to seal the lower semiconductor chip and the upper semiconductor chip. An upper spacer is disposed between the lower semiconductor chip and the heat slug. The upper spacer is disposed on the exposed surface of the lower semiconductor chip.

Abstract translation: 半导体封装包括衬底。 下半导体芯片设置在基板上方。 上半导体芯片设置在下半导体芯片上。 在下半导体芯片的一端的下半导体芯片的顶表面被暴露。 设置在上半导体芯片上方的散热片。 模制层设置在基板和热块之间。 模制层被配置为密封下半导体芯片和上半导体芯片。 上部间隔件设置在下部半导体芯片和热塞之间。 上隔板设置在下半导体芯片的暴露表面上。

公开(公告)号：US09482584B2

公开(公告)日：2016-11-01

申请号：US13776973

申请日：2013-02-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yun-hyeok Im ,  Kyol Park ,  Tae-je Cho

IPC: G01K7/00 ,  G01K7/34 ,  G01K7/16 ,  G01K7/42

CPC classification number: G01K7/34 ,  G01K7/16 ,  G01K7/42

Abstract: A method of predicting a temperature includes operatively coupling a temperature prediction circuit to a device including a semiconductor chip, determining a correlation between a current and voltage of the temperature prediction circuit, and predicting a temperature with respect to power applied to the device using the determined correlation.

Abstract translation: 预测温度的方法包括将温度预测电路可操作地耦合到包括半导体芯片的装置，确定温度预测电路的电流和电压之间的相关性，以及使用所确定的温度预测相对于施加到装置的功率的温度 相关性。

公开(公告)号：US09029998B2

公开(公告)日：2015-05-12

申请号：US14243165

申请日：2014-04-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eon Soo Jang ,  Kyol Park ,  Yunhyeok Im

IPC: H01L23/02 ,  H01L23/34 ,  H01L23/12 ,  H01L23/31 ,  H01L25/10 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/34 ,  H01L23/12 ,  H01L23/3128 ,  H01L23/42 ,  H01L23/49811 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/29194 ,  H01L2224/2929 ,  H01L2224/29309 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package device includes a lower package including a lower semiconductor chip mounted on the lower package substrate, a lower molding compound layer disposed on the lower package substrate, a first trench formed in the lower molding compound layer to surround the lower semiconductor chip, and a second trench connected to the first trench to extend to an outer wall of the lower package, the second trench being formed in the lower molding compound layer, an upper package disposed on the lower package. The upper package includes an upper package substrate and at least one upper semiconductor chip mounted on the upper package substrate and a heat transfer member disposed between the lower package and the upper package.

Abstract translation: 半导体封装器件包括下封装，其包括安装在下封装基板上的下半导体芯片，设置在下封装基板上的下模塑复合层，形成在下模塑复合层中以围绕下半导体芯片的第一沟槽，以及 连接到所述第一沟槽以延伸到所述下封装的外壁的第二沟槽，所述第二沟槽形成在所述下模塑复合层中，所述上封装设置在所述下封装上。 上封装包括上封装基板和安装在上封装基板上的至少一个上半导体芯片和设置在下封装和上封装之间的传热构件。

公开(公告)号：US09666503B2

公开(公告)日：2017-05-30

申请号：US14104435

申请日：2013-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Hyeok Im ,  Kyol Park ,  Hee-Jung Hwang

IPC: G01J5/00 ,  G01K1/00 ,  G01K7/00 ,  H01L23/34 ,  H01L23/36 ,  H01L23/498 ,  H01L25/10 ,  H01L25/18 ,  H01L23/14

CPC classification number: H01L23/34 ,  H01L23/145 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/49827 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A semiconductor package and an electronic system including the same include a package board having an electric circuit pattern. A semiconductor chip is mounted on the package board and electrically connected with the circuit pattern of the package board. A non-contact temperature detector is provided with the semiconductor package and detects a temperature of an external heat source without making contact with the external heat source. A temperature controller controls the semiconductor chip according to the temperature of the external heat source that is detected by the non-contact temperature detector.

公开(公告)号：US09293389B2

公开(公告)日：2016-03-22

申请号：US14577490

申请日：2014-12-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyol Park ,  Yun-Hyeok Im

IPC: H01L23/22 ,  H01L23/367 ,  H01L25/065 ,  H01L25/10 ,  H01L21/56 ,  H01L23/00 ,  H05K3/30 ,  H05K1/02 ,  H05K3/28

CPC classification number: H01L23/3675 ,  H01L21/561 ,  H01L23/367 ,  H01L23/3677 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/8385 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0209 ,  H05K3/284 ,  H05K3/30 ,  H05K2201/0215 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor package includes a circuit board having an inner circuit pattern and a plurality of contact pads connected to the inner circuit pattern, at least one integrated circuit (IC) device on the circuit board and making contact with the contact pads, a mold on the circuit board, the mold fixing the IC device to the circuit board, and a surface profile modifier on a surface of the IC device and a surface of the mold, and the surface profile modifier enlarging a surface area of the IC device and the mold to dissipate heat.

Abstract translation: 半导体封装包括具有内部电路图案和连接到内部电路图案的多个接触焊盘的电路板，电路板上的至少一个集成电路（IC）装置并与接触焊盘接触，模具在 电路板，将IC器件固定到电路板上的模具，以及IC器件表面和模具表面上的表面轮廓改性剂，以及将IC器件和模具的表面积扩大的表面轮廓修改器 散热

公开(公告)号：US20140217576A1

公开(公告)日：2014-08-07

申请号：US14095376

申请日：2013-12-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yun- Hyoek Im ,  Kyol Park ,  Hee-Seok Lee

IPC: H01L23/367 ,  H01L23/373

CPC classification number: H01L23/3733 ,  H01L23/3128 ,  H01L23/3736 ,  H01L23/4275 ,  H01L2224/16225 ,  H01L2924/15311

Abstract: A semiconductor package and a method of manufacturing the same are disclosed, wherein the semiconductor package includes a circuit board, a semiconductor chip mounted on the circuit board, an encapsulant positioned on the circuit board and encapsulating the semiconductor chip to the circuit board, and a thermal dissipating member positioned on the encapsulant and having a heat spreader that dissipates a driving heat from the semiconductor chip and a heat capacitor that absorbs excess driving heat that exceeds a heat transfer capability of the heat spreader, such that when a high power is applied to the package, the excess heat is absorbed into the heat capacitor as a latent heat and thus the semiconductor chip is protected from an excessive temperature increase caused by the excess heat, thereby increasing a critical time and performance duration time of the semiconductor package.

Abstract translation: 公开了一种半导体封装及其制造方法，其中半导体封装包括电路板，安装在电路板上的半导体芯片，位于电路板上的密封剂，并将半导体芯片封装在电路板上，以及 散热构件位于密封剂上并具有从半导体芯片散发驱动热量的散热器和吸收超过散热器的传热能力的过量驱动热的热电容器，使得当将高功率施加到 该封装中，多余的热量作为潜热被吸收到热电容器中，因此保护半导体芯片免受由于过量的热量引起的过度的温度升高，从而增加半导体封装的临界时间和性能持续时间。

公开(公告)号：US09054067B2

公开(公告)日：2015-06-09

申请号：US14095376

申请日：2013-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Hyoek Im ,  Kyol Park ,  Hee-Seok Lee

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/31 ,  H01L23/427

CPC classification number: H01L23/3733 ,  H01L23/3128 ,  H01L23/3736 ,  H01L23/4275 ,  H01L2224/16225 ,  H01L2924/15311

Abstract: A semiconductor package and a method of manufacturing the same are disclosed, wherein the semiconductor package includes a circuit board, a semiconductor chip mounted on the circuit board, an encapsulant positioned on the circuit board and encapsulating the semiconductor chip to the circuit board, and a thermal dissipating member positioned on the encapsulant and having a heat spreader that dissipates a driving heat from the semiconductor chip and a heat capacitor that absorbs excess driving heat that exceeds a heat transfer capability of the heat spreader, such that when a high power is applied to the package, the excess heat is absorbed into the heat capacitor as a latent heat and thus the semiconductor chip is protected from an excessive temperature increase caused by the excess heat, thereby increasing a critical time and performance duration time of the semiconductor package.

Abstract translation: 公开了一种半导体封装及其制造方法，其中半导体封装包括电路板，安装在电路板上的半导体芯片，位于电路板上的密封剂，并将半导体芯片封装在电路板上，以及 散热构件位于密封剂上并具有从半导体芯片散发驱动热量的散热器和吸收超过散热器的传热能力的过量驱动热的热电容器，使得当将高功率施加到 该封装中，多余的热量作为潜热被吸收到热电容器中，因此保护半导体芯片免受由于过量的热量引起的过度的温度升高，从而增加半导体封装的临界时间和性能持续时间。