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    Semiconductor device
    2.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11450681B2

    公开(公告)日：2022-09-20

    申请号：US16844234

    申请日：2020-04-09

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Haemin Lee ,  Jongwon Kim ,  Shinhwan Kang ,  Kohji Kanamori ,  Jeehoon Han

    IPC: H01L27/1157 ,  H01L27/11556 ,  H01L27/11521 ,  H01L27/11578

    Abstract: A semiconductor device includes a first stack group having first interlayer insulating layers and first gate layers, alternately and repeatedly stacked on a substrate and a second stack group comprising second interlayer insulating layers and second gate layers, alternately and repeatedly stacked on the first stack group. Separation structures pass through the first and second stack groups and include a first separation region and a second separation region. A vertical structure passes through the first and second stack groups and includes a first vertical region and a second vertical region. A conductive line is electrically connected to the vertical structure on the second stack group. A distance between an upper end of the first vertical region and an upper surface of the substrate is greater than a distance between an upper end of the first separation region and an upper surface of the substrate.

    Semiconductor memory devices
    3.
    发明授权
    Semiconductor memory devices 有权

    公开(公告)号：US10186519B2

    公开(公告)日：2019-01-22

    申请号：US15059993

    申请日：2016-03-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jongwon Kim ,  Hyeong Park ,  Hyunmin Lee ,  Hojong Kang ,  Joowon Park ,  Seungmin Song

    IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/11575

    Abstract: A semiconductor memory device includes a stack structure including gate electrodes vertically stacked on a substrate and a vertical channel part penetrating the gate electrodes, a bit line connected to the vertical channel part, and a plurality of conductive lines connected to the gate electrodes on the stack structure. The conductive lines form a plurality of stacked layers and include first conductive lines and second conductive lines. The number of the first conductive lines disposed at a first level from the substrate is different from the number of the second conductive lines disposed at a second level from the substrate. The first level is different from the second level.

    PROXIMITY CORRECTION METHODS FOR SEMICONDUCTOR MANUFACTURING PROCESSES
    7.
    发明申请
    PROXIMITY CORRECTION METHODS FOR SEMICONDUCTOR MANUFACTURING PROCESSES 有权

    公开(公告)号：US20210405521A1

    公开(公告)日：2021-12-30

    申请号：US17180984

    申请日：2021-02-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Taehoon Kim ,  Jaeho Jeong ,  Jeonghoon Ko ,  Jongwon Kim ,  Yejin Jeong ,  Changwook Jeong

    IPC: G03F1/36 ,  G03F7/20 ,  H01L21/027

    Abstract: A proximity correction method for a semiconductor manufacturing process includes: generating a plurality of pieces of original image data from a plurality of sample regions, with the sample regions selected from layout data used in the semiconductor manufacturing process; removing some pieces of original image data that overlap with each other from the plurality of pieces of original image data, resulting in a plurality of pieces of input image data; inputting the plurality of pieces of input image data to a machine learning model; obtaining a prediction value of critical dimensions of target patterns included in the plurality of pieces of input image data from the machine learning model; measuring a result value for critical dimensions of actual patterns corresponding to the target patterns on a semiconductor substrate on which the semiconductor manufacturing process is performed; and performing learning of the machine learning model using the prediction value and the result value.

    Semiconductor memory devices and methods for manufacturing the same
    9.
    发明授权
    Semiconductor memory devices and methods for manufacturing the same 有权

    公开(公告)号：US10700088B2

    公开(公告)日：2020-06-30

    申请号：US16220836

    申请日：2018-12-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jongwon Kim ,  Keejeong Rho ,  Jin-Yeon Won ,  Tae-Wan Lim ,  Woohyun Park

    IPC: H01L27/11582 ,  H01L27/11565

    Abstract: Semiconductor memory devices and methods for manufacturing the same are provided. The device may include vertical channel structures that are two-dimensionally arranged on a substrate and vertically extend from the substrate. The device may also include bit lines on the vertical channel structures, and each of the bit lines may be commonly connected to the vertical channel structures arranged in a first direction. The device may further include common source lines that extend between the vertical channel structures in a second direction intersecting the first direction and a source strapping line that is disposed at the same vertical level as the bit lines and electrically connects the common source lines to each other.

    SEMICONDUCTOR DEVICES
    10.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20220037347A1

    公开(公告)日：2022-02-03

    申请号：US17501149

    申请日：2021-10-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kwangyoung Jung ,  Jongwon Kim ,  Dongseog Eun ,  Joonhee Lee

    IPC: H01L27/11565 ,  H01L23/00 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11582

    Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate. The semiconductor device includes a stack structure including conductive layers stacked on the substrate. Moreover, the semiconductor device includes a dummy structure penetrating a stepped region of the stack structure. A portion of the dummy structure includes a first segment and a second segment. The first segment extends in a first direction in a plane parallel to an upper surface of the substrate. The second segment protrudes from the first segment in a second direction, in the plane, that intersects the first direction.

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