公开(公告)号：US10528259B2

公开(公告)日：2020-01-07

申请号：US15681574

申请日：2017-08-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngmin Lee ,  Ji-Seung Youn ,  Sungho Seo ,  Hyuntae Park ,  Hwaseok Oh ,  JinHyeok Choi

IPC: G06F3/06 ,  G06F12/02

Abstract: Disclosed is a storage device which includes a nonvolatile memory device and a controller. The controller communicates with a host through a first port, communicates with an external storage device through a second port, and controls the nonvolatile memory device based on first mapping information. The controller is configured to receive second mapping information from the external storage device, receive first write data from the host and to selectively transmit first write data to the external storage device based on the second mapping information.

公开(公告)号：US20180096711A1

公开(公告)日：2018-04-05

申请号：US15700257

申请日：2017-09-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungho Seo ,  Hyuntae Park ,  Youngmin Lee ,  Hwaseok Oh ,  JinHyeok Choi

IPC: G11C5/14 ,  G11C7/10

Abstract: An electronic device may include an embedded storage device connected to directly communicate with an extended storage device, and an application processor connected to directly communicate with the embedded storage device and connected to the extended storage device through the embedded storage device. The embedded storage device includes a monitoring device that monitors commands received from the application processor. The monitoring device generates a command state signal representing a state of the embedded storage device and the extended storage device based on a result of monitoring the commands. The embedded storage device operates so that a power supply is controlled in a part or all of the embedded storage device according to the command state signal.

公开(公告)号：US20180081595A1

公开(公告)日：2018-03-22

申请号：US15702035

申请日：2017-09-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngmin LEE ,  Sungho Seo ,  Hyuntae Park ,  Hwaseok Oh ,  JinHyeok Choi

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0626 ,  G06F3/0656 ,  G06F3/0683

Abstract: An electronic device includes an embedded storage device and an application processor. The embedded storage device is connected to directly communicate with a removable storage device which processes a packet having a first characteristic. The embedded storage device processes a packet having a second characteristic. The application processor is connected to directly communicate with the embedded storage device, but not directly connected to the removable storage device. The application processor processes a packet having a third characteristic. The embedded storage device compensates at least one of the first characteristic or the second characteristic, such that at least one of a first packet of the first characteristic received from the removable storage device or a second packet of the second characteristic in the embedded storage device is provided to the application processor according to the third characteristic.

公开(公告)号：US11422700B2

公开(公告)日：2022-08-23

申请号：US16735887

申请日：2020-01-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngmin Lee ,  Ji-Seung Youn ,  Sungho Seo ,  Hyuntae Park ,  Hwaseok Oh ,  JinHyeok Choi

IPC: G06F3/06 ,  G06F12/02

Abstract: Disclosed is a storage device which includes a nonvolatile memory device and a controller. The controller communicates with a host through a first port, communicates with an external storage device through a second port, and controls the nonvolatile memory device based on first mapping information. The controller is configured to receive second mapping information from the external storage device, receive first write data from the host and to selectively transmit first write data to the external storage device based on the second mapping information.

公开(公告)号：US10950281B2

公开(公告)日：2021-03-16

申请号：US16655782

申请日：2019-10-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongwoo Jeong ,  Hwaseok Oh ,  JinHyeok Choi

IPC: G11C7/22 ,  G11C7/10 ,  G11C29/02 ,  G11C16/08 ,  G11C16/32 ,  G11C8/12 ,  G11C29/50

Abstract: Disclosed is an electronic device which includes an application processor configured to generate a reference clock, a first storage device configured to receive the reference clock from the application processor through a clock input port, to output the reference clock to a clock output port, and to communicate with the application processor by using the reference clock, and a second storage device configured to receive the reference clock from the clock output port and use the reference clock for communication with the first storage device.

公开(公告)号：US20190278487A1

公开(公告)日：2019-09-12

申请号：US16414893

申请日：2019-05-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngjin CHO ,  Sungyong Seo ,  Sun-Young Lim ,  Uksong Kang ,  Chankyung Kim ,  Duckhyun Chang ,  JinHyeok Choi

IPC: G06F3/06 ,  G06F12/0893 ,  G11C11/00 ,  G06F13/16 ,  G06F12/0868 ,  G11C16/26 ,  G11C16/10

Abstract: A nonvolatile memory device includes a nonvolatile memory, a volatile memory being a cache memory of the nonvolatile memory, and a first controller configured to control the nonvolatile memory. The nonvolatile memory device further includes a second controller configured to receive a device write command and an address, and transmit, to the volatile memory through a first bus, a first read command and the address and a first write command and the address sequentially, and transmit a second write command and the address to the first controller through a second bus, in response to the reception of the device write command and the address.

公开(公告)号：US10572413B2

公开(公告)日：2020-02-25

申请号：US15685586

申请日：2017-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyuntae Park ,  Youngmin Lee ,  Sungho Seo ,  Hwaseok Oh ,  JinHyeok Choi

IPC: G06F13/28 ,  G06F11/30 ,  H04L12/40 ,  H04L12/403 ,  H04L29/08 ,  G06F12/1081 ,  H04L1/18

Abstract: According to at least some example embodiments of the inventive concepts, an electronic device includes an embedded storage device that is, configured to connect to a removable storage device, and configured to directly communicate with the removable storage device, when connected to the removable storage device; and an application processor connected to directly communicate with the embedded storage device and not directly connected with the removable storage device, wherein, the embedded storage device is configured to, in response to a disable command received from the application processor, decrease an amount of power supplied to all or some of circuits included in the embedded storage device, and provide a bypass path that is configured to transfer a normal command and data from the application processor to the removable storage device, when the removable storage device is connected to the bypass path.

公开(公告)号：US10424346B2

公开(公告)日：2019-09-24

申请号：US15700257

申请日：2017-09-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungho Seo ,  Hyuntae Park ,  Youngmin Lee ,  Hwaseok Oh ,  JinHyeok Choi

IPC: G11C5/14 ,  G11C7/10 ,  G11C29/02 ,  G11C29/04

Abstract: An electronic device may include an embedded storage device connected to directly communicate with an extended storage device, and an application processor connected to directly communicate with the embedded storage device and connected to the extended storage device through the embedded storage device. The embedded storage device includes a monitoring device that monitors commands received from the application processor. The monitoring device generates a command state signal representing a state of the embedded storage device and the extended storage device based on a result of monitoring the commands. The embedded storage device operates so that a power supply is controlled in a part or all of the embedded storage device according to the command state signal.

公开(公告)号：US10303372B2

公开(公告)日：2019-05-28

申请号：US15366137

申请日：2016-12-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngjin Cho ,  Sungyong Seo ,  Sun-Young Lim ,  Uksong Kang ,  Chankyung Kim ,  Duckhyun Chang ,  JinHyeok Choi

IPC: G06F13/16 ,  G06F3/06 ,  G11C16/26 ,  G11C16/10 ,  G06F12/0868 ,  G06F12/0893 ,  G11C11/00

Abstract: A nonvolatile memory device includes a nonvolatile memory, a volatile memory being a cache memory of the nonvolatile memory, and a first controller configured to control the nonvolatile memory. The nonvolatile memory device further includes a second controller configured to receive a device write command and an address, and transmit, to the volatile memory through a first bus, a first read command and the address and a first write command and the address sequentially, and transmit a second write command and the address to the first controller through a second bus, in response to the reception of the device write command and the address.

公开(公告)号：US10203909B2

公开(公告)日：2019-02-12

申请号：US15421514

申请日：2017-02-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngkwang Yoo ,  Youngjin Cho ,  Han-Ju Lee ,  JinHyeok Choi

IPC: G06F3/06 ,  G11C8/12 ,  G06F12/0868

Abstract: A nonvolatile memory module may include a nonvolatile memory device, a nonvolatile memory controller configured to control the nonvolatile memory device, a volatile memory device configured as a cache memory of the nonvolatile memory device, and a module controller configured to receive a command and an address from an external device, external to the nonvolatile memory module, and to send a volatile memory command and a volatile memory address to the volatile memory device through a first bus and a nonvolatile memory command and a nonvolatile memory address to the controller through a second bus in response to the received command and address. The volatile memory device is configured to load two or more cache data on each of two or more memory data line groups and two or more tags on each of two or more tag data line groups in response to the volatile memory address.