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公开(公告)号:US12191373B2
公开(公告)日:2025-01-07
申请号:US17526634
申请日:2021-11-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangkoo Kang , Sungsoo Kim , Sunki Min , Iksoo Kim , Donghyun Roh
IPC: H01L29/49 , H01L21/764 , H01L27/088 , H01L29/06 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/786
Abstract: A method includes: forming a sacrificial gate structure on the active region; forming a spacer structure including a first spacer, a second spacer, and an air-gap spacer, the air-gap spacer capped by bending an upper portion of the second spacer toward an upper portion of the first spacer; forming an insulating structure on the sides of the spacer structure; forming a gap region; and forming a gate structure including a gate dielectric layer, a gate electrode, and a gate capping layer in the gap region. The upper portion of the second spacer is in physical contact with the upper portion of the first spacer on a contact surface, and a lowermost end of the contact surface is on a level higher than an upper surface of the gate electrode with the substrate being a reference base level.
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公开(公告)号:US20220077301A1
公开(公告)日:2022-03-10
申请号:US17526634
申请日:2021-11-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangkoo Kang , Sungsoo Kim , Sunki Min , Iksoo Kim , Donghyun Roh
IPC: H01L29/49 , H01L21/764 , H01L27/088 , H01L29/06 , H01L29/417 , H01L29/786 , H01L29/66 , H01L29/78 , H01L29/423
Abstract: A semiconductor device includes a substrate including an active region extending in a first direction; a gate structure intersecting the active region and extending in a second direction on the substrate, the gate structure including a gate electrode, a gate capping layer on the gate electrode, and a plurality of spacers on side surfaces of the gate electrode; source/drain regions on the active region on at least one side of the gate structure; a first insulating layer and a second insulating layer on the source/drain regions on at least one side of the gate structure; and contact plugs on the source/drain regions and penetrating the first and second insulating layers. The plurality of spacers include a first spacer on the side surfaces of the gate electrode, an air-gap spacer on an external side surface of the first spacer, and a second spacer on an external side surface of the air-gap spacer. An upper portion of the second spacer is bent towards an upper portion of the first spacer and is configured to cap the air-gap spacer.
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公开(公告)号:US20210098592A1
公开(公告)日:2021-04-01
申请号:US16837329
申请日:2020-04-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangkoo Kang , Sungsoo Kim , Sunki Min , Iksoo Kim , Donghyun Roh
IPC: H01L29/49 , H01L29/06 , H01L29/417 , H01L29/423 , H01L29/786 , H01L29/78 , H01L21/764 , H01L29/66
Abstract: A semiconductor device includes a substrate including an active region extending in a first direction; a gate structure intersecting the active region and extending in a second direction on the substrate, the gate structure including a gate electrode, a gate capping layer on the gate electrode, and a plurality of spacers on side surfaces of the gate electrode; source/drain regions on the active region on at least one side of the gate structure; a first insulating layer and a second insulating layer on the source/drain regions on at least one side of the gate structure; and contact plugs on the source/drain regions and penetrating the first and second insulating layers. The plurality of spacers include a first spacer on the side surfaces of the gate electrode, an air-gap spacer on an external side surface of the first spacer, and a second spacer on an external side surface of the air-gap spacer An upper portion of the second spacer is bent towards an upper portion of the first spacer and is configured to cap the air-gap spacer.
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公开(公告)号:US11264219B2
公开(公告)日:2022-03-01
申请号:US16814040
申请日:2020-03-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kwangtae Hwang , Jinyong Kim , Iksoo Kim , Geumbi Mun , Junwon Lee , Jiwoon Im
IPC: H01J37/32
Abstract: Provided are a radical monitoring apparatus capable of monitoring electrical diagnosis of a radical produced by direct plasma or remote plasma and the amount of change of the produced radical, and a plasma apparatus including the radical monitoring apparatus. The plasma apparatus includes a process chamber in which a plasma process is performed, a dielectric film in the process chamber and surrounding sides of a plasma discharge space in the process chamber, and a sensor inside the dielectric film and configured to monitor plasma to thereby monitor a radical generated in the plasma.
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公开(公告)号:US20210193508A1
公开(公告)日:2021-06-24
申请号:US17003304
申请日:2020-08-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Geumbi Mun , Jinyong Kim , Junwon Lee , Kwangtae Hwang , Iksoo Kim , Jiwoon Im
IPC: H01L21/762 , H01L27/108 , H01L21/02
Abstract: To manufacture an integrated circuit (IC) device, a lower structure having a step structure defining a trench is prepared. A material film is formed inside the trench. To form a material film, a first precursor including a first central element and a first ligand having a first size is supplied onto a lower structure to form a first chemisorbed layer of the first precursor on the lower structure. A second precursor including a second central element and a second ligand having a second size less than the first size is supplied onto a resultant structure including the first chemisorbed layer to form a second chemisorbed layer of the second precursor on the lower structure. A reactive gas is supplied to the first chemisorbed layer and the second chemisorbed layer.
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公开(公告)号:US11456314B2
公开(公告)日:2022-09-27
申请号:US16882829
申请日:2020-05-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Changsoo Lee , Jongmyeong Lee , Iksoo Kim , Jiwoon Im
IPC: H01L27/1157 , H01L29/792 , H01L21/02 , H01L27/11582 , H01L27/11565 , H01L27/11573 , G11C7/18
Abstract: A semiconductor device may comprise a stack structure on a substrate, the stack structure including a plurality of dielectric layers and a plurality of transparent conductive oxide layers, the dielectric layers and the transparent conductive oxide layers are alternately stacked, each of the dielectric layers and a corresponding one of the transparent conductive oxide layer adjacent to each other in a vertical direction have equal horizontal widths, and a channel structure extending through the stack structure, the channel structure including an information storage layer, a channel layer inside the information storage layer, and a buried dielectric layer inside the channel layer.
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公开(公告)号:US11450554B2
公开(公告)日:2022-09-20
申请号:US17003304
申请日:2020-08-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Geumbi Mun , Jinyong Kim , Junwon Lee , Kwangtae Hwang , Iksoo Kim , Jiwoon Im
IPC: H01L21/62 , H01L21/02 , H01L21/762 , H01L27/108
Abstract: To manufacture an integrated circuit (IC) device, a lower structure having a step structure defining a trench is prepared. A material film is formed inside the trench. To form a material film, a first precursor including a first central element and a first ligand having a first size is supplied onto a lower structure to form a first chemisorbed layer of the first precursor on the lower structure. A second precursor including a second central element and a second ligand having a second size less than the first size is supplied onto a resultant structure including the first chemisorbed layer to form a second chemisorbed layer of the second precursor on the lower structure. A reactive gas is supplied to the first chemisorbed layer and the second chemisorbed layer.
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公开(公告)号:US11189707B2
公开(公告)日:2021-11-30
申请号:US16837329
申请日:2020-04-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangkoo Kang , Sungsoo Kim , Sunki Min , Iksoo Kim , Donghyun Roh
IPC: H01L29/49 , H01L27/088 , H01L29/06 , H01L29/417 , H01L29/423 , H01L29/78 , H01L29/786 , H01L29/66 , H01L21/764
Abstract: A semiconductor device includes a substrate including an active region extending in a first direction; a gate structure intersecting the active region and extending in a second direction on the substrate, the gate structure including a gate electrode, a gate capping layer on the gate electrode, and a plurality of spacers on side surfaces of the gate electrode; source/drain regions on the active region on at least one side of the gate structure; a first insulating layer and a second insulating layer on the source/drain regions on at least one side of the gate structure; and contact plugs on the source/drain regions and penetrating the first and second insulating layers. The plurality of spacers include a first spacer on the side surfaces of the gate electrode, an air-gap spacer on an external side surface of the first spacer, and a second spacer on an external side surface of the air-gap spacer An upper portion of the second spacer is bent towards an upper portion of the first spacer and is configured to cap the air-gap spacer.
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