公开(公告)号：US20230420248A1

公开(公告)日：2023-12-28

申请号：US18176692

申请日：2023-03-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunjun AHN ,  Hongtaek Lim ,  Kyoungwoo Hong ,  Hanhim Kang ,  Yeongyeop Song

IPC: H01L21/02 ,  H01L21/3205 ,  H01L21/285

CPC classification number: H01L21/0228 ,  H01L21/0217 ,  H01L21/02167 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02208 ,  H01L21/32051 ,  H01L21/28506

Abstract: A method of depositing an atomic layer of a metal-containing film including a plurality of deposition cycles is provided. Each of the plurality of deposition cycles may include adsorbing a hydrogen (H)-containing compound on a wafer surface in a chamber, treating a wafer on which the H-containing compound is adsorbed with hydrogen (H2) gas, and providing a metal precursor to the wafer to react with the H-containing compound to form the metal-containing film.

公开(公告)号：US20250120081A1

公开(公告)日：2025-04-10

申请号：US18761611

申请日：2024-07-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunjun AHN ,  Hanhim KANG ,  Donghwan LEE

IPC: H10B43/27 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

Abstract: A semiconductor device includes: a mold structure; and a first high aspect ratio via disposed in a second via hole which passes through at least a portion of the mold structure, wherein the low aspect ratio via includes a first seed pattern, which is disposed in the first via hole, and a first conductive pattern that is disposed on the first seed pattern, wherein the first high aspect ratio via includes a second seed pattern, which is disposed in the second via hole, a second conductive pattern, which is disposed on the second seed pattern, a deposition inhibition pattern, which covers at least a portion of the second conductive pattern, and a third conductive pattern, which covers the deposition inhibition pattern, and wherein the deposition inhibition pattern includes a material which is less in surface free energy than the second conductive pattern.

公开(公告)号：US20240102160A1

公开(公告)日：2024-03-28

申请号：US18461976

申请日：2023-09-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunjun AHN ,  Byounghoon JI ,  Kyoungwoo HONG

IPC: C23C16/455 ,  H01J37/32 ,  H01L21/02

CPC classification number: C23C16/45527 ,  H01J37/32449 ,  H01L21/0228 ,  H10B43/27

Abstract: A method of depositing an atomic layer is provided. The method includes a plurality of deposition cycles. Each of the plurality of deposition cycles includes rotating a valve plate included in an exhaust port by a first angle while supplying a precursor to a chamber into which a substrate is loaded, rotating the valve plate by a second angle while supplying a purge gas to the chamber, rotating the valve plate by a third angle while supplying a reactor to the chamber, and rotating the valve plate by the second angle while supplying the purge gas to the chamber, and wherein the first angle, the second angle, and the third angle are certain angles between an upper surface of the valve plate and a virtual plane vertical to an internal path of the exhaust port, and the first angle differs from the third angle.