Patent search ap:("Samsung Electronics Co. Page Ltd.") AND inv:"Chul PARK"

1.

发明申请
SEMICONDUCTOR PROCESSING APPARATUS HAVING GAS SPRAY UNIT 审中-公开
Title translation: 具有气体喷雾装置的半导体加工装置

公开(公告)号：US20160194756A1

公开(公告)日：2016-07-07

申请号：US14972598

申请日：2015-12-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hongtaek LIM , Jeonghoon NAM , Chul PARK , Youngchae SEO , Jaihyung WON , Seungmoo LEE , Donghoon HAN

IPC: C23C16/455 , C23C16/44

CPC classification number: C23C16/45512 , C23C16/4412 , C23C16/45565 , C23C16/45574 , C23C16/45591

Abstract: A semiconductor processing apparatus includes a susceptor supporting a processing target, a gas box spaced apart from the susceptor, the gas box including a concave region facing an upper surface of the processing target, and an inclined surface at an outer side of the concave region, an inclination angle of the inclined surface of the gas box relative to an upper surface of the susceptor is more than 10° and less than 35°, and a shower head within the concave region of the gas box.

Abstract translation: 一种半导体处理装置，包括支撑处理对象的基座，与基座间隔开的气箱，包括面对加工对象的上表面的凹部的气体盒和凹部的外侧的倾斜面，气箱的倾斜面相对于基座的上表面的倾斜角度大于10°且小于35°，以及在气箱的凹入区域内的喷头。

2.

发明申请
SEMICONDUCTOR PACKAGE 审中-公开
Title translation: 半导体封装

公开(公告)号：US20160118371A1

公开(公告)日：2016-04-28

申请号：US14733909

申请日：2015-06-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chul PARK

IPC: H01L25/18 , H01L25/065 , H01L23/00 , H01L23/498

CPC classification number: H01L25/18 , H01L23/13 , H01L23/5384 , H01L23/5386 , H01L24/13 , H01L24/16 , H01L24/17 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/131 , H01L2224/13147 , H01L2224/16145 , H01L2224/16227 , H01L2224/81193 , H01L2224/81194 , H01L2224/94 , H01L2225/06513 , H01L2225/06517 , H01L2225/06555 , H01L2924/10253 , H01L2924/1431 , H01L2924/1434 , H01L2924/1436 , H01L2924/1437 , H01L2924/1438 , H01L2924/14511 , H01L2924/15153 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2224/81 , H01L2924/014

Abstract: A semiconductor package includes a package substrate, a first semiconductor chip having a plurality of first connection terminals disposed on a bottom surface thereof, and a second semiconductor chip having a plurality of second connection terminals disposed on a top surface thereof. The first semiconductor chip is stacked on the package substrate so that a first group of connection terminals among the plurality of first connection terminals are combined with the package substrate. The second semiconductor chip is disposed so that the plurality of second connection terminals are combined with a second group of connection terminals among the plurality of first connection terminals.

Abstract translation: 半导体封装包括封装衬底，具有设置在其底表面上的多个第一连接端子的第一半导体芯片和设置在其顶表面上的多个第二连接端子的第二半导体芯片。第一半导体芯片堆叠在封装基板上，使得多个第一连接端子中的第一组连接端子与封装基板组合。第二半导体芯片设置成使得多个第二连接端子与多个第一连接端子中的第二组连接端子组合。

3.

发明申请
SEMICONDUCTOR PACKAGE INCLUDING STEPWISE STACKED CHIPS 审中-公开

公开(公告)号：US20170125378A1

公开(公告)日：2017-05-04

申请号：US15404090

申请日：2017-01-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chul PARK , Kilsoo KIM , In LEE

IPC: H01L25/065 , H01L23/00

CPC classification number: H01L25/0652 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L2224/05554 , H01L2224/16225 , H01L2224/32145 , H01L2224/48091 , H01L2224/48137 , H01L2224/48139 , H01L2224/48147 , H01L2224/48225 , H01L2224/48227 , H01L2224/49175 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06558 , H01L2225/06562 , H01L2924/00014 , H01L2924/00 , H01L2224/05599 , H01L2224/45099 , H01L2224/85399

Abstract: A semiconductor package comprises a package substrate; a first chip stack and a second chip stack mounted side by side on the package substrate, wherein the first and second chip stacks each include a plurality of semiconductor chips stacked on the package substrate, wherein each of the semiconductor chips includes a plurality of bonding pads provided on a respective edge region thereof, wherein at least some of the plurality of bonding pads are functional pads, and wherein the functional pads occupy a region that is substantially less than an entirety of the respective edge region.

4.

发明申请
LIGHT EMITTING DIODE LIGHTING MODULE 有权
Title translation: 发光二极管照明模块

公开(公告)号：US20130083525A1

公开(公告)日：2013-04-04

申请号：US13645056

申请日：2012-10-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won-Hoe KOO , Chul PARK , Yun Seok WOO , Il Seok LEE , Dong Il LIM , Deok Hee Hee HAN

IPC: F21V13/04 , F21V13/12 , F21V13/02

CPC classification number: F21K9/00 , F21V3/049 , F21V3/12 , F21V13/02 , F21V17/10 , F21V17/14 , F21Y2105/10 , F21Y2115/10

Abstract: A light emitting diode (LED) lighting module is provided including an LED array, and at least one of a diffusing portion and a reflecting portion. The LED array, equipped with at least one LED, may include a side wall which surrounds the at least one LED . The diffusing portion may be detachably coupled to the LED array and may include a diffusion plate which diffuses light emitted from the at least one LED The reflecting portion may be detachably coupled to one of the LED array and the diffusing portion and may reflect light emitted from the at least one LED. The LED array may be selectively coupled with the diffusing portion, the reflecting portion, or both the diffusing portion and the reflecting portion.

Abstract translation: 提供了一种发光二极管（LED）照明模块，其包括LED阵列，以及漫射部分和反射部分中的至少一个。配备有至少一个LED的LED阵列可以包括围绕至少一个LED的侧壁。漫射部分可以可拆卸地耦合到LED阵列，并且可以包括漫射板，其漫射从至少一个LED发射的光。反射部分可以可拆卸地耦合到LED阵列和漫射部分中的一个，并且可以反射从所述至少一个LED。 LED阵列可以选择性地与扩散部分，反射部分或扩散部分和反射部分耦合。

5.

发明申请
SEMICONDUCTOR PACKAGE 审中-公开

公开(公告)号：US20190244944A1

公开(公告)日：2019-08-08

申请号：US16137743

申请日：2018-09-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seonggwan LEE , Chul PARK

IPC: H01L25/18 , H01L23/498 , H01L25/065 , H01L23/00 , H01L23/31

CPC classification number: H01L25/18 , H01L23/3128 , H01L23/3135 , H01L23/49816 , H01L24/05 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L2224/04042 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/48091 , H01L2224/48106 , H01L2224/48145 , H01L2224/48227 , H01L2224/49175 , H01L2224/73215 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562 , H01L2225/06586 , H01L2924/1434

Abstract: A semiconductor package including a substrate including an external terminal; a first semiconductor chip on the substrate and having a first and a second region; at least one second semiconductor chip on the second region of the first semiconductor chip, the at least one second semiconductor chip exposing a top surface of the first region of the first semiconductor chip; and at least one third semiconductor chip on the at least one second semiconductor chip, wherein the first semiconductor chip includes a first pad electrically connected to the at least one second semiconductor chip; a second pad electrically connected to the at least one third semiconductor chip; and a third pad electrically connected to the external terminal, the first pad is on the top surface of the first region, and at least one of the second pad and the third pad is on a top surface of the second region.