公开(公告)号：US20180076105A1

公开(公告)日：2018-03-15

申请号：US15641288

申请日：2017-07-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Baek KI ,  Tark-Hyun KO ,  Kun-Dae YEOM ,  Yong-Kwan LEE ,  Keun-Ho JANG

IPC: H01L23/10 ,  H01L23/057 ,  H01L23/00

CPC classification number: H01L23/10 ,  H01L21/561 ,  H01L21/565 ,  H01L23/057 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/5384 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1412 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/15151 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01049 ,  H01L2924/00014

Abstract: A semiconductor package includes a package substrate including at least one through-hole in a chip mounting region, a plurality of wiring patterns at a top surface of the package substrate. The wiring patterns include respective extension portions and respective landing pads. At least some of the landing pads obliquely extend toward the through-hole. Conductive bumps are formed on corresponding landing pads to connect to a semiconductor chip mounted on the chip mounting region of the package substrate. A molding material extends between the top surface of the package substrate and the semiconductor chip and fills the through-hole.

公开(公告)号：US20190295909A1

公开(公告)日：2019-09-26

申请号：US16441591

申请日：2019-06-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Baek KI ,  Tark-Hyun KO ,  Kun-Dae YEOM ,  Yong-Kwan LEE ,  Keun-Ho JANG ,  Sang Jin HYUN

IPC: H01L23/10 ,  H01L23/13 ,  H01L23/538 ,  H01L23/057 ,  H01L21/56

Abstract: A semiconductor package includes a package substrate including at least one through-hole in a chip mounting region, a plurality of wiring patterns at a top surface of the package substrate. The wiring patterns include respective extension portions and respective landing pads. At least some of the landing pads obliquely extend toward the through-hole. Conductive bumps are formed on corresponding landing pads to connect to a semiconductor chip mounted on the chip mounting region of the package substrate. A molding material extends between the top surface of the package substrate and the semiconductor chip and fills the through-hole.